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AFE031 No DAC Output

Other Parts Discussed in Thread: AFE031

Hello,

I am trying to configure the AFE031 to output a signal. I believe that my SPI bus is correctly configured because I am able to write to a configuration register and then perform a read which returns the correctly written value. However, when I then put the DAC line high and try to write values into the DAC register, I get no output on the DAC output.

I am configuring the AFE031 as shown below:

// Reset AFE031
spi_xmit(0x0914);
for(i = 0; i < 100000; i++) {}

// Enable PA, TX, DAC
spi_xmit(0x0123);
for (i = 0; i < 100000; i++) {}

// Enable REF1, REF2, PA_OUT
spi_xmit(0x030E);
for (i = 0; i < 100000; i++) {}


Shown below is a scope capture of SPI traffic trying to update the DAC register.


The output of PA shows no signal. The only curious thing I can find is that the I_FLAG bit of the RESET register always appears to be set, even after I reset the device and write a zero to that bit which should clear it. I have the I_FLAG_EN bit disabled in the Control2 register so I_FLAG should never get set in the first place.


Is there something I am missing in the configuration of the AFE031?

  • Hello Maxwell Brock,

    Thank you very much for posting the oscilloscope capture of your signals; it is helpful in troubleshooting the situation.

    From the image it looks like you are running your SCLK at about (5/3) MHz and you are transmitting 16-bit codewords into the DAC. Bear in mind that the DAC will only make sense of the first ten bits transmitted (the 10 most significant bits) and discard the rest. You wrote 0x28ED of which the first ten bits represent decimal 163. For such code (and assuming you are providing 3.3 V to the analog supplies AVDD1 and AVDD2) one would expect the Tx_PGA output (pin 14) to read one of the values below (depending on which gain you have programmed):

     

    Tx_PGA_GAIN (V/V)

    Tx_PGA_OUT (V)

    0.25

    1.371

    0.5

    1.092

    0.707

    0.860

    1

    0.533

     

    What value do you measure on pin 14? Can you also probe pins 19 and 28 and tell me what is your reading before and after executing the lines corresponding to “// Enable REF1, REF2, PA_OUT”?

    You mentioned “The output of PA shows no signal.”. Does the PA output (pins 42 and 43) read 0 V with respect to pins 40 and 41?

    Could you please include a schematic indicating your power supplies and how you are connecting the signal from Tx_PGA_Out (pin 14) to PA_IN (pin 18)? Are you using the Tx filter? If so, what values are you writing to “Control 1” register?

    The I_FLAG will be set as long as the PA and PA_OUT are not enabled. After a soft reset the PA and PA_OUT will be disabled thereby raising the I_FLAG. If you are interested in using the I_FLAG you need to first enable PA and PA_OUT, enable the references and ensure the PA input is not driving the PA out into the upper rail or into ground. After that you can clear the I_FLAG and it will remain low unless any of the following events happen:

    1)      An over-current event, or

    2)      The input is driven to a voltage such that the PA out goes to ground or to the upper PA supply rail, or

    3)      The PA output (PA_OUT) is disabled.

    Best regards,

    Jose