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PGA113: Controls by MSP430F6659 via SPI

Part Number: PGA113
Other Parts Discussed in Thread: MSP430F6659

Hi,

I was trying to operate PGA113 with the MSP430F6659 via SPI. First i had a delay of 35.6 uS between the first 8bit and the second 8bit, as it's shown in the next photo:



The only way I could solve this was to write the buffer a second time without asking if it is free, as seen in the ISR

UCA0TXBUF= PGA_Data1; //Escribe mas significativo
UCA0TXBUF= PGA_Data2; //Escribe menos significativo

I'm using SPI mode 10. The data that i'm sending is 0x2A21 (Gain=5 CH=1), or 0x2A20 (Gain=5 CH=0),. Vref=GND, and AVDD=DVDD=5v. The data is sent correctly in the interval in which the PGA is enabled

Without connecting the SPI pins, and with CH0/CH1 to GND, the output is 0v. When I connect a DC source to CH1 or CH0 (according to the command) and various input voltage from 0v to 0.5v the output is still 0v. These values are of the second PCB that I made with other PGA113, with the first one and the same conditions the output was 1.23v or 3v, some value of those, but it also did not change by varying the input.

I think my problem is a communication problem, but I do not see it. I also think that I respect the SPI timming

My code is:

Main.c :

//                   MSP430F6659
//                 -----------------
//             /|\|                 |
//              | |                 |
//              --|RST          P1.0|-> LED
//                |                 |
//                |             P2.4|-> Data Out (UCA0SIMO)
//                |                 |
//                |             P2.5|<- Data In (UCA0SOMI)
//                |                 |
//       PGA CS <-|P5.2         P2.3|-> Serial Clock Out (UCA0CLK)



#include <msp430.h>
#include "SPI.h"
#define  LED_DIR	P1DIR
#define  LED_OUT  	P1OUT
#define  LED		BIT0
#define  PGA_DIR    P5DIR
#define  PGA_OUT	P5OUT   //P5.2 pin 28
#define  PGA_CS	 	BIT2


unsigned int dato1=0,dato2=0,n=1;
unsigned int PGA_Data1=0x2A; //Escribir
unsigned int PGA_Data2=0x21; //Ganancia 5 CH1
//unsigned int PGA_Data2=0x20; //Ganancia 5 CH0

void main(void){

	WDTCTL = WDTPW | WDTHOLD;	// Stop watchdog timer

	Port_Mapping(); //LLamo funcion que me mapea los puertos del SPI

    Init_SPI(); //LLamo funcion que configura SPI

    PGA_DIR |= PGA_CS; //Defino como salida P3.0 que es el CS del PGA
    PGA_OUT |= PGA_CS; //Desabilito PGA
    __enable_interrupt();                     // Re-enable all interrupts

    LED_DIR |= LED;  //Define como salida el P1.0
    LED_OUT &=~ LED; //Apago el LED

while(1){



		//---------------------TX SPI PGA----------------------------------------------------------------
					__delay_cycles(50);

					PGA_OUT &=~ PGA_CS; //Habilito PGA (activo por bajo)
					__delay_cycles(50);

					n=1;
					UCA0IE |= UCTXIE ; // Habilito interrupcion transmision (al hacer esto salta a la ISR)

					__delay_cycles(50);
					LED_OUT ^= LED;
					PGA_OUT |= PGA_CS; //Deshabilito PGA
		//------------------------------------------------------------------------------------------------

		}
}


}



//-----------------------------------RUTINA DE INTERRUPCION SPI------------------------------------
#pragma vector=USCI_A0_VECTOR //vector de interrupcion, hay uno solo para transmicion y recepcion

__interrupt void USCI_A0_ISR(void)
{
switch(__even_in_range(UCA0IV,4))   //Pregunta por UCA0IV, que es registro de vectores de interrupcion
  {
	//Segun el valor de ese registro es quien genero la interrupcion

    case 0: break;                        // Vector 0 - no interrupt  //NO hay interrupcion pendiente
    case 2: break;                        // Vector 2 - RXIFG       //Se recibio un dato
    case 4:								  // Vector 4 - TXIFG     //El buffer de transmision esta libre
      switch(n){
      	  case 0:
      		  UCA0IE &=~ UCTXIE ; // Deshabilita interrupcion transmision
      		  break;
      	  case 1:
      		  UCA0TXBUF= PGA_Data1; //Escribe mas significativo
      		  UCA0TXBUF= PGA_Data2; //Escribe menos significativo
      		  UCA0IE &=~ UCTXIE ; // Deshabilita interrupcion transmision
      		  break;
      	  case 2:
      		  break;
      	  default: break;
      	 }

      default: break;
  }

}
//-------------------------------------------------------------------------------------------------

SPI.h:

#include <msp430.h>

#define SPI_MODO_00	0
#define SPI_MODO_01	1
#define SPI_MODO_10	2
#define SPI_MODO_11	3

#define MSP430_SPI_MODO SPI_MODO_10 //Cambiar aca el modo de SPI que se quiera


//************************************************************************************************************************************
// Funcion: Port_Mapping
// Configuracion el mapeo de puertos para el SPI
//************************************************************************************************************************************
void Port_Mapping(void);
//************************************************************************************************************************************

//************************************************************************************************************************************
// Funcion: Init_SPI
// Configuracion del USCI A0 SPI
//************************************************************************************************************************************
void Init_SPI(void);
//************************************************************************************************************************************


SPI.c :


#include "SPI.h"

//************************************************************************************************************************************
// Funcion: Port_Mapping
// Configuracion el mapeo de puertos para el SPI
//************************************************************************************************************************************
void Port_Mapping(void){
	__disable_interrupt(); // Disable Interrupts before altering Port Mapping registers

		PMAPKEYID  = PMAPKEY;
		//Escribir la key 2D52h me garantiza acceso de escritura a todos los registros de control de mapeo de puertos

		//Para cada port pin Px.y que tiene la funcion de mapeo, un registro PxMAPy esta disponible

	       P2MAP3 = PM_UCA0CLK; //P2.3 conecto el CLK (pin 15 bornera)
	       P2MAP4 = PM_UCA0SIMO; //P2.4 conecto el SIMO (pin 16 bornera)
	       P2MAP5 = PM_UCA0SOMI; //P2.5 conecto el SOMI (pin 17 bornera)

		PMAPKEYID = 0; //Escribiendo cualquier valor desabilito el acceso al Port Mapping



	 	P2SEL |= BIT3|BIT4|BIT5;  //Selecciono funcion periferico P2.3, P2.4 y P2.5
	 	P2DIR |= BIT3|BIT4;//|BIT5  //los defino como salida P2.3 P2.4
	 	P2DIR &=~BIT5; //defino como entrada P2.5

}
//************************************************************************************************************************************

//************************************************************************************************************************************
// Funcion: Init_SPI
// Configuracion del USCI A0 SPI
//************************************************************************************************************************************
void Init_SPI(void){

    UCA0CTL1   |=   UCSWRST;  // **Put state machine in reset**

#if (MSP430_SPI_MODO == SPI_MODO_00)
 UCA0CTL0 |= UCMST|UCSYNC|UCMSB; // 3-pin, 8-bit SPI master, MSB, Modo 0 0: Clock Fase low y Clock polarity low
#endif
#if (MSP430_SPI_MODO == SPI_MODO_01)
 UCA0CTL0 |= UCMST|UCSYNC|UCMSB|UCCKPL; // 3-pin, 8-bit SPI master, MSB, Modo 0 1: Clock Fase low y Clock polarity high
#endif
#if (MSP430_SPI_MODO == SPI_MODO_10)
 UCA0CTL0 |= UCMST|UCSYNC|UCMSB|UCCKPH; // 3-pin, 8-bit SPI master, MSB, Modo 1 0: Clock Fase high y Clock polarity low
#endif
#if (MSP430_SPI_MODO == SPI_MODO_11)
 UCA0CTL0 |= UCMST|UCSYNC|UCMSB|UCCKPH|UCCKPL; // 3-pin, 8-bit SPI master, MSB, Modo 1 1: Clock Fase high y Clock polarity high
#endif


    UCA0CTL1   |=  UCSSEL_2;   //  SMCLK (ver que el clock este bien definido)
    UCA0BR0    =  0;   // Si quisiera dividir el SMCLK cambiar aca
    UCA0BR1    =   0;  //
    UCA0MCTL   =   0;  //  No  modulation

   UCA0CTL1   &=~ UCSWRST;   //  **Initialize    USCI    state   machine**

}
//************************************************************************************************************************************

  • Hi Fernando,

    I'm a little unclear on what you did in your DC testing of the device, but it seems like the device hasn't actually been enabled. I don't see anywhere in your code where you have issued an SDN_DIS WRITE command to enable the device. There is a footnote in the datasheet that says: "SDN = Shutdown mode. Enter Shutdown mode by issuing an SDN_EN command. Shutdown mode is cleared (returned to the last valid write configuration) by a SDN_DIS command or by any valid Write command." So if you issue a valid write command, the device should automatically enable. However, you said you are using SPI mode 10, but the PGA113 only supports SPI modes 00 and 11, so I would worry that you have never actually issued a valid write command, and thus the device stays disabled. Please try changing your SPI mode to see if this fixes the problem. If not, then we can involve some engineers from the MSP430 team as they will have more expertise in digital communications and may be better able to assist you.

    Regards,
    Zak Kaye
    Precision Amplifiers Applications
  • Hi Zack, in my DC testing I'm connecting a DC source to the input (CH0 or CH1) and keeping the unused input to ground. I think too that the device is not enabled.
    I don't see why i have to use an SDN_DIS WRITE command. As the way I see it with a valid write command the device is automatically enabled. I know that the device only supports mode 00 or 11, I read the MSP430 datasheet and to me the mode 10 of the msp was equivalent to the 00 in the PGA, but I am not sure, so I tried with both modes 00 and 10. It will be useful if you can clear this for me, but it won't fix my problem.
    Regards,
    Fernando
  • Fernando,

    SPI mode 00 should be the same for the PGA113 and MSP430.

    What is the supply voltage you are using on the MSP430? From your scope plots, I'm assuming it's about 3.5V. If you are using a 5V DVDD on the PGA113 then to read logic high the MSP430 has to output AT LEAST 0.7 x DVDD, or 3.5V. Since you are right at this edge it is possible the PGA113 is not recognizing your input as a valid signal. As a quick test, you could drop the DVDD supply a little bit and see if your DC test outputs what you expect.

    Additionally, how are you driving the CS pin on the PGA113? I don't see anywhere in your code where you mapped this pin. From the datasheet: "If there are not even-numbered increments of 16 clocks (that is, 16, 32, 64, and so forth) between CS going low (falling edge) and CS going high (rising edge), the device takes no action." Hope this helps!

    Regards,
    Zak Kaye
    Precision Amplifiers Applications
  • Zack,

    I'm using a 3.3v supply voltage on the MSP430F6659. I also have a MSP430F5529LP with which I am also testing, and the supply is also 3.3v. In the lines 22-24 and 40-41 is where i mapped the CS of the PGA, and i used the CS in the line 54 and 62. I didn't notice that the logic high has to be al least 0.7 DVDD, you are right my output is of 3.4v. I tried with DVDD from 3.3 to 4.5v after reading your post, but it didn't work. I also counted the CLK's increments, and i have 16.

    Making probes, i noticed that when i only conects the 3 wires of SPI, in the DVDD pin i got 2.36v, and in VOUT i got 0.86v. After i connect the diferent sources DVDD=1.5v, AVDD=5v, CH1=0.4v, and things keep the same. Later when i increment DVDD to a value >2.4v, e.g. 3v, the things changes, in the DVDD pin now i got 3v and in VOUT i got 3v and tracks the DVDD values when i increment it.

    Continuing the test, i disconnect the 3 SPI wires and keep the other sources connected, and now VOUT=VDD even if DVDD<2.4v. I don't know if this test tell y tell you something, make my know. Thanks!

    Here is the squematic of my PCB

    Regards,

    Fernando