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LF298: Does S&H Droop When No Load on Output?

johny radio
Intellectual 820 points
Part Number: LF298

hi

is the droop rate show in Figure 4. Output Droop Rate the same, whether or not there's a load on the output?

Meaning, if the output is disconnected, will droop rate remain the same?

Datasheet

  • 0
    TI__Mastermind 23050 points

    Hi Johny,

    There is a buffer amplifier between the sample and hold capacitor and the output of the device, so loading should not influence the droop rate of the hold capacitor. Droop is largely influenced by the input bias current of the buffer amplifier and whatever leakage may occur through the switch.

  • 0 in reply to Zak Kaye
    Intellectual 820 points

    Thx for reply, Zak.

    Based on your reply, it seems i was conceptually correct that the output load causes leakage. Except, it's the output of the first opamp, before the buffer. 

    My understanding is that the capacitors are the greatest source of leakage in a S&H, no?

    I need the V to stay within about 245 ppm (equivalent to 12 bits resolution, i believe). I need to hold voltage for about 5 hours. 

    If my math is correct, your Figure 4 indicates over 3.5V/hour droop at temp 85C with a 1 uF cap, correct?

    I can scale the Vss to whatever V will help achieve that. i can look at the output infrequently, and very briefly. I can also reload the just-sampled V to restore the S&H to original level after i read it. 

    I'm more concerned about leakage when i'm not looking at it. Is there any method to reduce droop to my requirement? 

    Thx!

  • 0 in reply to johny radio
    TI__Mastermind 23050 points

    Johny,

    The capacitors will also introduce a leakage component as they self discharge through their insulation resistance. The type of capacitor you select for this will have a significant impact on the rate at which this occurs. Given this, the curve above is intended to show how the capacitor will leak as a result of bias current and switch leakage assuming an ideal capacitor. Measured data is going to deviate from this as there are other effects not being considered.

    Your math checks out, and even if you keep the temperature at 25C with a 1uF cap you're going to see 500mV of droop or so over the course of 5 hours. You can only increase the capacitor so much before the input amplifier runs into stability issues or the sample and hold capacitor takes excessively long to charge. This is also going to vary board to board with differences in bias current, capacitance, and non-ideal capacitor characteristics. This makes it difficult to account for without calibrating for the droop profile of every board.

    Given the application I don't think it's very feasible to use an analog circuit for this measurement. Even if you try a discrete implementation and significantly reduce bias current there are still going to be issues with cap self-discharge. Though it is a much more costly approach I think you would be better off taking a reading with an ADC, storing this in the digital domain, and using a DAC to interface with whatever you need to.

  • 0 in reply to Zak Kaye
    Intellectual 820 points

    Hi Zak

    Thx much. I am still curious if there's any type of droop-free analog S&H,
    but for the moment an ADC appears to be our only option.

    Regarding cost, Mouser's price for this LF298 S&H is $2.61 for one,
    while Mouser's least-expensive TI ADC , the ADS1000A0IDBVR, is $2.38, 
    and several others under $3. 
    (not to be taken as plug for Mouser, btw).

    So the ADC is actually cheaper than the S&H.

    Of course, there's the cost of supporting components.
    So my next goal is to try and minimize that :)

    They'll be hearing from me over on your Converter forum :D

    Many thanks!