INA148: to set the tolerance for offset and Gain on pspice model

Can you give some more details on how you are trying to use the INA148? Supply voltages and input common mode voltage?

Hello Tim - I have a 7 battery cells (each at 4.1V max) connected in series with a total string voltage of 28.7V. Each cell is across an input of a corresponding INA148. Each INA148 is power by the total string voltage and brings its terminal voltage (i.e. cell voltage) down with respect to ground (lowest potential of entire string) for an ADC to measure. My question is as I move up the string, will the output error increase as the CM increases. If so, then what is the greatest expected error over temperature for the highest potential INA148?

Hi Dale,

This is given by the Power Supply Rejection Ratio (PSRR) and Common-Mode Rejection Ratio (CMRR). You can see from that datasheet that with a change of 1 volt in the supply you can expect the offset to move by +/-50uV typically and up to +/-400uV. Similarly for the CMRR the typical value is 86dB, meaning that a 1V change at the input will produce a 50uV shift in offset. The temperature drift spec tells you how the offset will shift with temperature relative to the inherent value. If you wanted to do an absolute worst case analysis, then you could take all of these parameters to their extremes, but this would not be a very realistic case as it's incredibly unlikely that all parameters will exhibit the worst case behaviors and be additive. Ultimately you will have to determine what the largest error you can tolerate is and use your best engineering judgement to decide if the part fits.