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how Fdiv works in TPS57040
I can't get how fDIV feature works.
could you provide a detailed description? can I control this in a manner?
many many thanks in advance
The TPS57040 is similar to the TPS54040. The nominal switching frequency is set by a resistor from RT/CLK pin to GND. When teh VSENSE voltage is above 0.6V, the converter will work at that frequency. For normal regulation, VSENSE should always be 0.8 V. The frequency foldback feature is mainly meant for over current situations. During over current, the on time will be limited by the peak current limit detect. So the required duty cycle may be less than what is required for regulation. Tis will cause the output voltage to fall (along with the fed back voltage at VSENSE). When VSENSE falls below 0.6 V, the operating frequency is cut in half (50%). When VSENSE falls below 0.4 V, the operating frequency is cut in half again (25%). When VSENSE falls below 0.2 V, the operating frequency is cut in half again (12.5%). This reduction of the operating frequency serves to increase teh "off" time as teh on time is already limited by the peak current limit detect. During the"'off'" time, the switch current is decreasing, so increased "off" time allows teh converter switch current to decrease more progressively during incrementally greater over current conditions. This helps to prevent current runaway as the current can increase above the over current threshold during the first 100 nsec (blanking time) of the "on" time cycle.
SWIFT DC/DC Applications
thanks a lot John
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