DS90UH925Q Power up

Kei Sato73562

Expert 2310 points

Other Parts Discussed in Thread: DS90UH925Q

There is "Power Up Requirements and PDB PIN" for datasheet of DS90UH925Q.

There, the following contents are written.

"The VDDs (VDD33 and VDDIO) supply ramp should be faster than 1.5 ms with a monotonic rise. ....."

Why must it rise earlier than 1.5ms.

I think that PDB should just be set to "High" after VDD and VDDIO rise.

over 9 years ago

0 Alexander Scheuermann over 9 years ago

TI__Genius 14890 points

Sato-san,

This question is also better answered in this forum.

0 Jason Blackman over 9 years ago in reply to Alexander Scheuermann

TI__Genius 14015 points

Sato-san,

You are correct about PDB. We want PDB to go high after the supplies are stable.

The 1.5ms monotonic rise note is to avoid an issue where the supply ramps slowly and has a dip in voltage. The part can get into a latched state if the reset threshold is crossed several times rapidly, for example due to noise.

Let me know if you have any other questions.

Thanks,
Jason

Interface

Interface forum

DS90UH925Q Power up