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TPS65381 SPI Error(186)

Hello,

 

Please following question about SPI Error.

 

1)    01: Command error(Datasheet P76)

Please explain what is 01: Command error.

Does the error occur when device receive instruction that does not exist?

 

2)    Please explain the reason of following each error. (Datasheet P67)

-STAT[2]: SPI SDO error (during previous SPI frame)

-STAT[1]: Data-phase parity (during previous SPI frame)

-STAT[0]: Invalid SPI transfer

 

Best Regards.

  • Hi Ushikubo-san,  I'll look into these and get back with you in the next few days.

    - Scott

  • Hello Scott-san,

    Please answer for my question.

    Best Regards.

  • Q1)    01: Command error(Datasheet P76)

    Please explain what is 01: Command error.

    Does the error occur when device receive instruction that does not exist?

    A1)  Correct, a command error is when the TPS65381 receives a command via SPI that does not exist.  

     

    Q2)    Please explain the reason of following each error. (Datasheet P67)

     -STAT[2]: SPI SDO error (during previous SPI frame)

    A2a)  The TPS65381 SDO pin monitors it’s own output, if the output on the SDO pin doesn’t match what the device should be shifting out this bit is set.

     

    -STAT[1]: Data-phase parity (during previous SPI frame)

    A2b)  This error is set when the parity of the data (phase) does not match the parity expected for the command for the last SPI frame. So when it is read as set it means the error occurred in the n-1 SPI frame. The parity is shown in table 5.5.6 “SPI Command Table”.  The 16-bit SPI frame including the parity bit is shown in Figure 5-18 on page 67. 

     

    -STAT[0]: Invalid SPI transfer

    A2c)  An invalid SPI transfer could be any of the following:  wrong command, correct 7bits command but incorrect parity, undefined command.

  • Hello Scott-san,

    Thank you for your answer.

     

    I can’t understand A2c).

    Please explain what is “wrong command” and “undefined commend”.

     

    Best Regards.

  • The command list is summarized on page 87, section 5.5.6 of the datasheet.  If a command is given that doesn't match in this list it is "wrong" or "undefined".  The state machine in the device cannot recognized the command and will set this flag.

    - Scott

  • Hello Scott-san,

    Thank you very much for your answer.

    Best Regards.

  • Hello Scott-san,

     

    Please answer additional following question about STAT[1] and STAT[0].

    You answered as follows for each Status bit.

     

    -STAT[1]: Data-phase parity (during previous SPI frame)

    A2b)  This error is set when the parity of the data (phase) does not match the parity expected for the command for the last SPI frame. So when it is read as set it means the error occurred in the n-1 SPI frame. The parity is shown in table 5.5.6 “SPI Command Table”.  The 16-bit SPI frame including the parity bit is shown in Figure 5-18 on page 67. 

     

    -STAT[0]: Invalid SPI transfer

    A2c)  An invalid SPI transfer could be any of the following:  wrong command, correct 7bits command but incorrect parity, undefined command. 

     

    According to your answer command parity error set both STAT[1] and STAT[0].

    Please advise difference of each command parity error.

     

    Best Regards.

  • Hello scott-san,

    Please answer above my question.

    Best Regards.

  • Hello Scott-san,

    Please answer for my question.

    Best Regards.
  • Hello Scott-san,

    Please answer my question I posted on Mon, Nov 17 2014 .

    Best Regards.
  • Hi Ushikubo-san,

    A2b: this is for data parity
    A2c: is on command parity. I have checked with the GUI and if you send a SPI command with incorrect parity the Invalid SPI transfer bit is set, not the data-phase parity bit.

    It depends on which part of the SPI frame.

    -Scott
  • Hello Ushikubo-san,

    We have worked to clarify what these bits and I have the following update.

    STAT[1]:  Data-phase parity (during previous SPI frame)

    This bit was supposed to provide the parity from the shifted in data on SDI for the previous SPI frame.  We looked into this on the bench and design and confirm there is an errata.

    This bit is always zero.  The datasheet will be updated to show STAT[1]: 0  in future revisions.

    STAT[0]:  Invalid SPI transfer  definitions includes wrong or undefined command and correct 7bits command but incorrect parity.

    Scott

  • Hello Scott-san,

     

    Thank you for your answer.

    My question was made clear.

     

    Best Regards.