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TPS65381 VSOUT1 183a-4

Hello,

 

Please answer following questions when send WR_CAN_STBY with CANWU=1 and resisters are not initialized at the restart of STANDBY state.

 

I use VSOUT1 so VSOUT1 is enabled while ACTIVE state.

 

Q1:

Is it required to disable VSOUT1 before send WR_CAN_STBY?

I’m afraid that VSOUT1 is enabled while ABIST in RESET and DIAGNOSTICS and it cause ABIST failure or any problem.

 

Q2:

I tested the behavior of Device STATUS after WR_CAN_STBY using EVM and result is attached file.

0677.VSOUT1.pptx

1)    When VSOUT1=0 or VSOUT1=1 and no additional load to VSOUT1, Device Status of GUI changed Safe -> Diagnostics -> safe after WR_CAN_STBY.

2)    When VSOUT1=1 and added 100hmm + 100uF load to VSOUT1 to delay the startup of VSOU1, Device Status of GUI changed Safe -> safe after WR_CAN_STBY and it seems that Diagnostics timeout counter is not working and changed from Diagnostics to Safe immediately.

 

Please explain the mechanism of 2)

 

Best Regards.

  • Toshio,

    The apps engineer responsible for this is out of the office today but should respond when he gets back.  Thank you for your patience.

    -Clancy

  • I' m not aware of VSOUT1 should be disabled before sending the WR_CAN_STBY. There is 600mS diagnostic state time out. I believe it is hard to see it when using the GUI.

  • Hi Ushikubo-san,

    Is this linked to the previous CANSTBY issues, or you are really getting the device into standby mode cleanly? It seems you have the other external conditions when you are issuing the CANSTBY command?   Please clarify so we can answer to the specific use case. 

    VSOUT1 normally does not need to be disabled before the CANSTBY command. In standby mode all regulators are off, but if this is linked to the quick restart it may have an impact as you have shown. 

    Please clarify the case and conditions.

    -Scott

  • Hello Scott-san,

    Thank you for your reply.

     

    This is linked to the previous CANSTBY issues.

    I tested sending WR_CAN_STBY when CANWU=1, so device go into standby state without register initialization. So VSOUT1_EN is not cleared while standby state and is kept enabled while ABIST of Reset state. I expect ABIST fail (VSOUT1 UV/OV comparator test) occur in case of page2 of my yesterday’s attached file, because VSOUT1 UV/OV comparator test use real VSOUT1 voltage and it does not reach target voltage when ABIST is started.

    Device seems transition to reset to safe state but ABIST UV/OV error doesn’t occur.

     

    Best Regards.

  • Hello Scott-san,

    Please answer above my question.

    Best Regards.

  • Hi Ushikubo-san,

    In this case it is recommended to disable VSOUT1 prior to the WR_CANWU_STBY to avoid this cycle and ensure no sensor is supplied prior to the device start up. 

    - Scott

  • Hello Scott-san,

    Thank you for your answer.

     

    Customer’s application can accept that VSOUT1 supplied at the same time with other voltage and they want to reduce SPI access as much as possible.

     

    I predict that ABIST fail occurs if VSOUT1 is enabled while ABIST (in Reset) and VSOUT1 is delayed from VDD3/5.

    Please answer following questions to explain the necessity of disable VSOUT1 prior to the WR_CANWU_STBY.

     

    Q1: Your answer has “avoid this cycle”.

    Please explain what you mean “avoid this cycle”.

     

    Q2: I tested the behavior on EVM when VSOUT1_EN=1 and VSOUT1 is delayed from VDD3/5.

    Please refer attached file.

    4380.VSOUT1 20141205.pptx

    AVI file is capture of GUI and behavior is summarized in table. .

     

    I expected that ABIST_UVOV_ERR occurs (in Reset) and transit to SAFE, and it seems EVM behaves as such.

    But ABIST_UVOV_ERR occurs only when DEV_ERROR_CNT=1 and WR_CAN_STBY is sent.

     

    Could you explain why ABIST_UVOV_ERR =1 doesn’t occur every time after WR_CAN_STBY is sent?

     

    Best Regards.

  • Hi Ushikobo-san,

    A1:  "avoid this cycle" means please disable VSOUT1 and wait enough time for the supply to ramp down prior to sending WR_CAN_STBY sot that it will not be detected by ABIST on the reset cycle when ABIST runs.

    A2:  did you confirm the GUI actually re-enabled VSOUT1 each time?  I suspect the difference may be due to VSOUT1 not actually being re-enalbe each time you click WR_CAN_STBY.  Either you can do it or I can check on Monday.

    - Scott

  • Hello Scott-san,
    Thank you for your reply.

    Q1: I understand that we need to disable VSOUT1 prior to sending WR_CAN _STBY not to cause ABIST error. But I need to be clear Q2 (why ABIST_UVOV_ERR doesn’t occur every time.).

    Q2: I confirmed that VSOUT1 is re-enabled each time after I sent WR_CAN_STBY on GUI and oscilloscope, but ABIT_UVOV_ERR occur only after 2nd WR_CAN_STBY.
    Please refer AVI file in attached file of my last POST.

    Best Regards.
  • Hi Ushikubo-san,

    I just ran this in our lab. GUI set up I fresh powered up and started the device and ran the sequence in your second video.  I saw the ABIST OV/UV set with every sending of the CANSTBY command.

    The GUI and device leave the VSOUT enabled.

    - Scott

  • Hello Scott-san,

    Thank you for your information.

    Please confirm following my test condition is same with you.

        VSOUT1 is tracking mode to VCC5.

        DEV_REV of my TPS65381 is 30h.

        VSOUT1 has additional load (100ohm and 100uF) to GND.

                            

    Best Regards.

  • Hi Ushikubo-san,

    That was the test configuration.  Since the 100 ohm and 100uF is a very capacitive load the VSOUT1 has a very long time constant during this test.  The timing of clicking on the CANSTB command could matter depending on how much the VSOUT1 has discharged between attempts of doing this. 

    - Scott