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TPS65381-Q1 SPI STATUS

Mitsuharu Iwasaki55
Intellectual 750 points

Hello,

Q1:

When a processor reads SPI register such as SAFETY_ERR_STAT after power-on, STAT[3] is "1".

I though it would be "0", because  this read is first acsess to the register.

Why is it "1"?

Q2:

STAT bits are previous SPI acsess information. If a processor want to know STAT bits,

Does the processor need to acess SPI to confirm STAT bits again?

It looks like dummy read.

Best Regrds,

Mitsharu Iwasaki

  • 0
    TI__Mastermind 20580 points
    Hi Iwasaki-san,

    A1: I just tried this on my lab bench and do not see a 1 in STAT[3]. I powered up the device, fresh from un-powered to get a clean Power on RESET, and sent the RD_SAFETY_ERR_STAT command (8 bit = 0xAA). The device status flag byte response was 0xA0 (10100000) so STAT[3] is 0 as expected. I also did a write command followed by the read and the status flag byte response was 0xA8 (10101000) so STAT[3] is 1 as expected. Please double check your software.

    A2: This information is there as additional information for the processor (software) and the software could do checks against it on following read or writes to the device. For better diagnostic coverage it is recommended to follow each write by a read to make sure the actual register was updated as expected.

    Scott