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TPS65381-Q1 WD fail

Hello,

When WDT_FAIL_CNT reaches 7 and WD_RST_EN = 1, on the next bad event in the watchdog timer the device will go through the RESET state.
But after Power-up, PMIC goes to RESET through STANBY. How can a external procesoor understand that PMIC comes from ACTIVE->RESET by WD_FAIL_CNT error or PMIC comes from SATNBY->RESET by Power-up?

Regrads.,
Mitsuharu Iwasaki