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PGA450-Q1 programming on SPI interfase

Other Parts Discussed in Thread: PGA450-Q1, PGA450Q1EVM

Hello all.

I try programming PGA450-q1 on SPI interfase.

I write firmware on keil and check it on evolution board. My firmware working correct.

I connected PGA450 with STM32 and try programming this device.

I switched off internall controller with 162F01 command and send byte array from hex file, after i switched on internall controller with 162F00 command.

But PGA450 not responded.

I try programming my board with TI-GER board and PGA450 responded.

After I try switching on and off PGA450 and was great result, it work.

But I can't programming this microsheme on SPI interfase.

I send data in format 0x1F ADRESS_HI ADRESS_LO DATA[i],

where 0x1F - command write to DEVRAM memory; ADRESS++; and DATA - it byte array.

Help me PLEASE

  • Sergey,

    The appropriate applications engineer has been notified of your question and will respond accordingly.

    Regards,
    Eric Hackett
  • Sergey,

    Have you programmed the OTP to "Jump to DEVRAM"?

    Before writing to DEVRAM via the SPI bus, ensure you have executed the following instructions:

    1) If the PGA450-Q1 is being programmed for the first time, the result of clicking “Check OTP Status” will read back “OTP EMPTY”. Confirm this is true on the pristine setup.

     

    2) Since the objective is program the PGA450-Q1 more than once, we must leverage the DEVRAM memory, rather than OTP. However, the OTP must be initially programmed to “Jump to DEVRAM” in order to enable the user to leverage DEVRAM. This is achieved through the Long Jump unconditional (LJMP addr 16) instruction as found in Table 20 of the PGA450-Q1 datasheet.

     

    3) To set the “Jump to DEVRAM” instructional using the SPI bus, use the OTP write SPI protocol memory access mode as referenced from Table 15 from the datasheet.

     

    4) The particular order and specific SPI instructions required to execute the process is as listed in Table 1. The SPI message for the PGA450-Q1 uses a 1-byte word and 2 or 3 additional bytes.

     

    Table 1. Jump to DEVRAM SPI Command Sequence

    Step

    Purpose

    SPI MOSI Message (Hex)

    1

    Place internal MICRO in RESET to communicate with external MCU via SPI

    0x162F01

    2

    Ensure external MCU can successfully communicate via SPI by reading the TEMP_SENSE value.

    0x19B4XX

    3

    Write 0x02 to OTP Addr 0x0000 to call LJMP

    0x07000002

    4

    Write 0x20 to OTP Addr 0x0001 as MSB half of LJMP pointer to the start of DEVRAM address

    0x07000120

    5

    Write 0x00 to OTP Addr 0x0002 as LSB half of LJMP pointer to the start of DEVRAM address

    0x07000200

     

    The PGA450Q1EVM GUI was not used to execute this command sequence. The TIGER board’s MCU was used as an example external MCU, whereby the SPI messages were manually forced using the DIRECT TIGER CONTROL GUI’s SPI TEST tab. USE SETUP NUMBER 2 is required for commands 1 and 2, while USE SETUP NUMBER 3 is required for commands 3, 4, and 5.

     

    5) If the default firmware TI provides is used as a template, then the STARTUP.A51 file with DEVRAM enabled relocates the firmware to DEVRAM via a LJMP to address 0x2000 as programmed onto the OTP of the PGA450-Q1. Once the OTP has been written to, the value written is considered to be permanent (unless the IC is de-capped and exposed to ultraviolet memory eraser).

     

    6) Program DEVRAM via SPI.