Hello,
Customer plan to use TPS65051-Q1 and has following question.
Please advise the minimum on-time of DCDC1 and DCDC2.
Customer wants to confirm if their design has margin for minimum on-time.
Best Regards.
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Hello,
Customer plan to use TPS65051-Q1 and has following question.
Please advise the minimum on-time of DCDC1 and DCDC2.
Customer wants to confirm if their design has margin for minimum on-time.
Best Regards.
Hello Karl-san,
Thank you for your answer.
I understand that it isn’t datasheet spec.
But customer wants to know the minimum on time margin for their VINDCDC1/2, VOUT use case.
So could you supply any evaluation data of minimum on time?
Or how did TI validated the minimum on time margin for worst use case of datasheet spec (VINDCDC1/2=6V max and VOUT=0.6V min) when this device was developed?
(Rough estimation of worst case on time is “0.6V/6V x 1/2.25MHz = 44ns”, and TI should have checked the device margin against 44ns on time.)
Best Regards.
Hello Karl-san,
Thank you for your answer.
I want to confirm if following my understanding is correct.
It is guaranteed that TPS65051-Q1 work correctly with Vin=6V, Vout=0.6V and following load condition.
DCDC1:1A
DCDC2:0.6A
Best Regards.
Hello Karl-san,
Please answer following new question from customer.
Please advise TI recommended value of “△IL / Maximum Current(DCDC1:1A and DCDC2:0.6A)” for example 20% to 40% for TPS65051-Q1.
Customer wants to know this value to determine optimum inductance vale for their use case.
Also please let me known the situation of looking through all your characterization data (minimum on time).
Best Regards.