Hi TI experts,
I am studying TPS659039 through reading the data sheet, SWCS095H –AUGUST 2013–REVISED OCTOBER 2015,
at page 81, there is Figure 6-1 shows me 2x I2C connections between PMIC and DSP, in this data sheet, I found the statement,
(page 58) The GPC I2C interface (I2C1_SCL_SCK and I2C1_SDA_SDI) is dedicated to access the configuration
registers of all the resources of the system.
The DVS I2C interface (I2C2_SCL_SCE and I2C2_SDA_SDO) is dedicated to access the DVS registers
independently from the GPC I2C.
my understanding is I2C1 dedicate for general purpose control and I2C2 dedicate for DVS control, am I right ?
next step I check the TDA2x EVM (Rev G3) , and I found the design is I2C1 and I2C2 of PMIC both come from I2C1 of DSP
which is different from the Figure 6-1 in PMIC's data sheet.
furthermore the I2C signal to I2C2 of PMIC is disconnected by NO-POP resistors' PCB design.
I am confused by the EVM design, is it possible to help me understand the reason why TI design NO-POP on I2C2 connection
and make it unavailable ? could I populate 0 ohm resistors on the NO-POP location and make the hardware work ?
regarding the difference between EVM and Figure 6-1, I think both are correct , 1x I2C from DSP to both I2C1/I2C2 of PMIC (EVM design)
and 2x I2C from DSP to I2C1/I2C2 of PMIC (PMIC data sheet Figure 6-1) both could work for TPS659039, am I right ?
regards,
Jack