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TPS65381-Q1: Switching the Overvoltage, Undervoltage and Overtemperature bits thru Software

Part Number: TPS65381-Q1

Hi Team,

I have a customer who is using the TPS65381-Q1. They now want to test the reaction of their driver software on the external MCU to the overvoltage, undervoltage and overtemperature flags. Is it possible to somehow toggle these relevant register bits in VMON_STAT_1 , VMON_STAT_2, and SAFETY_STAT_1 through software (like an SPI write?) rather than actually providing the external phyiscal condition (e.g. short circuit, high temperature)?

In case it is not possible to write to these bits, are there any recommended physical test conditions or circuits for overvoltage, undervoltage and overtemperature testing?

Thanks and Regards,

Mihir,

FAE - Germany

  • Hi Mihir,

    I've moved your post to the Automotive Forum to ensure that the experts are able to find it.
  • The engineers who support this are out of the office for the holidays. They will be back after the new year, and will respond to your question then.

    Thanks,

    -Clancy
  • Hi Mihir,

    The answer to your question depends on if they want to test the software driver a few times to prove the logic in the software driver or the system, this is called fault injection and the real fault must be injected externally to the TPS65381-Q1 into the system. If they are looking for a "nicer" way to just test the software driver, unfortunately there is not way to make the TPS65381-Q1 "falsely" set error reporting flag bits without the real fault.

    Test conditions to cause OV, UV and OT for system testing: this is highly system depending and what is connected to the various points where the fault injection is needed for testing of the software and system. Not some of these tests could potentially cause damage to ICs in the system depending on their specific ratings so care needs to be taken to try and inject the fault in a way to show the reaction but not cause transients or conditions outside the absolute maximum of the devices attached in the system.

    Overvoltage (OV): an external power supply with enough current capability to overdrive the rail supplied by the TPS65381-Q1. The goal is to set the current limit just above that of the TPS65381-Q1 output max current to try and prevent sever conditions. Try to slowly ramp above the OV detection thresholds of the TPS65381-Q1 but keep the voltage below the absolute maximum of the other devices in the system. Raise the voltage and current (sink/source) just to the point where the supply can cause the OV level for detection.

    Undervoltage (UV): an external power supply with enough current capability to overdrive the rail supplied by the TPS65381-Q1. The goal is to set the current limit just above that of the TPS65381-Q1 output max current to try and prevent sever conditions. Try to slowly ramp below the UV detection thresholds of the TPS65381-Q1. Lower the voltage and current (sink/source) just to the point where the supply can cause the UV level for detection.

    Overtemperature (OT): Is more challenging to isolate the OT to just the OT sensor you want to test. An external thermal stream or oven is needed to raise the temperature of the TPS65381-Q1, normally high load current on the specific rail's OT sensor being tested is also needed to ensure that section of the device is higher temperature than the rest of the device. Using EN_VDDx_OT bits can be used to change the device reaction to specific OT sensors. Try to ramp up the temperature to reach the OT detection thresholds of the TPS65381-Q1, keep in mind these are all above the Tj absolute maximum so the device and other components in the system are being subjected to extreme temperature to perform such a fault injection.

    If they are asking about diagnostic coverage on these monitoring functions, then it is a different answer:

    The TPS65381-Q1 has Analog Built in Self Test (ABIST) that checks the comparators for the VMON section of the device and the device has separate band gap references for voltage regulation on those rails (BG1) vs the monitoring of the rails (BG2). You cannot "Write" to these bits to somehow test them, ABIST is included to test the functionality, the SPI registers are to output the status of the monitoring function. OT monitoring is a secondary monitoring to current limits, and there is no direct way to monitor it without an injected fault scenario (over temperature).

    The ABIST runs at device power up (each transition out of STANDBY) state as shown in figure 5-1 of the datasheet (Rev F) and ABIST runs again as part of BIST on each transition from RESET to DIAGNOSIC state (assuming AUTO_BIST_DIS is 0, default).

    Section 5.4.1.5 explains ABIST and section 5.4.1.6 explains LBIST (which also re-runs ABIST).

    ABIST (or LBIST) can also be re-run at any time in DIAGNOSTIC or ACTIVE state by the MCU command (scheduled) assuming the end application can allow the ENDRV pin to be low for the ABIST (or LBIST) run times. Also note, during ABIST run the regulation will be working so outputs are un-changed, however the monitoring of the rails is not covered during ABIST run time.

    Please let me know if this is enough to help, or if something else is needed.

    Scott
  • Hi Scott,

    Thanks for the detailed reply! I think this answers the question.

    Regards,
    Mihir