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DS90UB(H)947/8 EVM recommendation settings

Nao
Genius 4905 points

 

Hi, E2E Menbers

DS90UB(H)947/8 EVM recommendation settings

Our customer starts to evaluate FPD-Link3 that following environment.
They want to know that TI recommendation EVM dip switch and register settings.

MCU --- RGB to OpenLDI ---> DS90UB(H)947 EVM ---> DS90UB(H)948 EVM ---> OpenLDI to RGB ---> LCD panel.
                    (FPGA)                                                                                                                             (FPGA)
*All data is 1080p 60FPS.

Let me know if you have recommendation setting.

Regards,
Nao

  • 0
    Genius 4905 points
    Hi, E2E Members

    This is more information.
    Our customer would like to know following case register setting.

    DS90UH947 (TX：OpenLDI⇒FPD-LINKⅢ 2-lane)
    - Operation Case
    - 1080p/60fps
    - HDCP disable
    - INPUT
    -> Single Link Open LDI 8-lane
    -> PixelCLK：170MHz
    -> Data Type：24bit RGB
    - OUTPUT
    -> FPD-LINKⅢ 2-lane
    -> PixelCLK：96MHz（MAX：112MHz）
    - I2C disable
    - I2S disable
    - SPI disable

    DS90UH948 (RX：FPD-LINKⅢ 2-lane⇒OpenLDI)
    - Operation Case
    - 1080p/60fps
    - HDCP disable
    - INPUT
    -> FPD-LINKⅢ 2-lane
    -> PixelCLK：96MHz (MAX：112MHz)
    - OUTPUT
    -> Dual Link OpenLDI
    -> PixelCLK：170MHz
    - I2C disable
    - I2S disable
    - SPI disable

    Regards,
    Nao