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DDC112
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  • Forum Post: DDC112

    Nathan Jones
    Hello to all, I'm new here so I hope this is the proper place for this question. I would appreciate any help you all can give me! I am currently working with the DDC112, dual current input 20-bit ADC, and had a question about the line in the datasheet (pg. 9) that says: " For the best...
    on Apr 19, 2010

  • Forum Post: Re: DDC11xEVM-PDK Kit

    Bob Benjamin
    Jan, If the 10 Meg ohm resistor is in the circuit, the signal will be reduced as the signal will be restricted by the resistance of the resistor. The resistor can also add noise. If the photosensor is connected to IN2, then remove the JP3 jumper and place a wire jumper between P9 and P10 at Z5. If...
    on Jan 3, 2012

  • Forum Post: Re: DDC11xEVM-PDK Kit

    Bob Benjamin
    Jan, I'm glad to see you are making progress. I didn't think of the power supply connection. Powering from the DDCMB is a relatively new feature, and it worked fine in initial testing. Regarding the drift, there is a small temperature drift of the DDC112 itself, but there will also be some...
    on Jan 4, 2012

  • Forum Post: Re: DDC11xEVM-PDK Kit

    Bob Benjamin
    Jan, I'm glad to hear that you are getting good results. Unfortunately we do not have any Labview code to work directly with the DDC112. Best regards, Bob B
    on Jan 11, 2012

  • Forum Post: Re: DDC11xEVM-PDK Kit

    Bob Benjamin
    Jan, Yes, the digital portion of the DDC112 responds to digital logic levels as specified for logic high and logic low as shown in the datasheet. Best regards, Bob B
    on Jan 20, 2012

  • Forum Post: Re: DDC11xEVM-PDK Kit

    Bob Benjamin
    Jan, Basically that is correct, however you need to look at table VIII in the datasheet. 0 code is actually -0.4% of full scale so you need to adjust the ratio accordingly. To get the correct ratio, you need the (output code - zero code) divided by the full scale which will be the ratio relative to...
    on Feb 3, 2012

  • Forum Post: Re: DDC11xEVM-PDK Kit

    Bob Benjamin
    Jan, I'm not sure why you are seeing two different readings unless it has something to do with the test setup. For this test I would use a voltage source with a very high value of series resistance where I know the actual current output. If you are using a photodiode as your test input, it...
    on Feb 6, 2012

  • Forum Post: DDC112 TEST Mode communication

    Benjamin Kuch
    Hi everyone, I just get into the DDC112. A first prototype is built and I'm currently implementing the communication. This is what I did so far: Within the initialization TEST is set to HIGH and RANGE0-2 is set to 111 (Cf = 87.5pF) CLK is connectect to the 7.372800MHz microcontroller clock...
    on Apr 25, 2012

  • Forum Post: RE: DDC112 TEST Mode communication

    Bob Benjamin
    Benjamin, What we need to see is the timing of all the clocks and data as shown on an oscilloscope. You did not say the timing of the DCLK period. You must make sure that you are not shifting out data when CONV toggles. Also, all data must be shifted out before the next falling edge of DVALID. The...
    on Apr 26, 2012

  • Forum Post: RE: DDC112 TEST Mode communication

    Bob Benjamin
    Benjamin, Glad to here you are making progress. I'm not sure which type of digital filter is used for the DDC112. Basically the delta-sigma modulator oversamples the input and by doing so moves the quantization noise into the higher frequencies and the digital filter then removes the higher frequency...
    on May 4, 2012

  • Forum Post: RE: DDC112 TEST Mode communication

    Bob Benjamin
    Benjamin, You should be able to use the SPI peripheral. You just need to make sure you maintain the timing requirements for the DDC112. Best regards, Bob B
    on May 19, 2012

  • Forum Post: RE: DDC112 TEST Mode communication

    Bob Benjamin
    Benjamin, I really don't see anything obviously wrong here. Have you verified your data with a scope reading? As you are only looping through 20 bits, you should not be getting a larger value. You may have an issue passing the variable within your program. Best regards, Bob B
    on Jul 11, 2012

  • Forum Post: RE: DDC114 transient response characteristics

    Eduardo Bartolome
    Hi, I do not have the experience with this myself so, the following is just a guess... I think a portion of the transient current from the photodiode will flow into the feedback capacitor of the integrator (where you expect it to go) and a portion into the parasitic capacitance of the photodiode...
    on Mar 15, 2013

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