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TLV2556-EP: ADC SPI logic level shifting from 5V (ADC) to 3.3V microcontroller

Part Number: TLV2556-EP
Other Parts Discussed in Thread: TLV2556

I want to supply this ADC with 5V for VCC but will be hooking it up to a microcontroller that wants 3.3V logic.  I have two concerns:

My first concerns were will the ADC see a high from the microcontroller on it's SPI inputs, it looks like it should see anything about 2V as a high so that should work with a good bit of tolerance, but please correct me if I'm wrong.

My second concern was shifting the logic level down on the ADC's SPI data line out (DATA OUT) pin from 5V logic to 3.3V logic.  I was planning on using a voltage divider (20K and 30K) to create a 3V high and current sink of 100uA.  I was looking through the datasheet and was uncertain as to how much current the digital output pin could tolerate and if this was a good/best-practice solution.  I could use a logic shifting IC but feel that may be overkill/overengineering.  Will this divider work without overstressing the ADC digital output?

Thanks!

  • Matt, the person who normally would support this device is out on travel.
    However, I think I can help you in his absence.

    The TLV2556 can operate at 3.3v, so this could allow you to not require a level shifter. Not sure if this is an option for you for performance or other reasons.

    If you need to operate at 5v, the best practice would be a level shifter.
    If you want to use a voltage divider, you can see that the device is rated for VOL of 400mv with IOL of 1.6mA (at 5.5v). Similarly with VOH of 2.4v and IOH of 1.6mA.
    Your voltage divider of 100uA bias would not be stressing the device with respect to current load.

    One other concern may be how well this voltage divider will work driving the processor. Depending on the routing, and capacitance, it may not be fast enough.

    The TLV2556 does not have an IBIS model available, but it could be represented by a voltage source driving the divider.

    Do you know the input requirements for the processor? Possibly it has 5v tolerant inputs? If so, then level translation would not be required.

    Regards,
    Wade
  • Matt,
    I am assuming that you have resolved your issues. I am going to close this post as resolved. You can post back, and it will re-open the post.
    Regards,
    Wade