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ADC128S102QML-SP: ADC128S102QML-SP - Failure Modes

Part Number: ADC128S102QML-SP

I would like to know if you have stated the failure modes of the component ADC128S102QML-SP? Thanks in advance, Andrés. 

  • Hello Andres,

    We do not have a listing separate from the datasheet.

    Here are the most common issues discussed:

    The most important thing is not to exceed the abs max limits.  No pins should be taken beyond the abs max voltage shown in the datasheet, even if the current is limited on that pin.  If violating abs doesn't immediately damage the part, it may impact the life of the part.   We have not characterized the lifetime of the part for operation beyond abs max.

    As far as performance goes, none of the imputs should be taken beyond the power supply rails.  Taking an unused imput beyond the ralis will impact the reading on the input benig sampled.

    The track and hold capacitors are not reset after each sample.  The input should be low impedance or residual charge in the parts caps could impact the performance.

  • Hi Kirby,

    Thanks for your response.

    One failure mode that I'm looking for is the following: suppose that the internal state machine of the A/D get stucked and it send through the SPI interface always the same digital stored value, no matter wich is the input.

    May that be possible?
  • I do not know of a scenario where the internal state machine could get stuck. The only thing close to that would be is if the data in is not properly clocked in, the channel being sampled will not change. There needs to be 16 full clock cycles or the registers will not be updated.
  • Thanks for your support, Kirby!