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ADS52J90EVM: How to change the register value of 0x173 with GUI software

Part Number: ADS52J90EVM

Hello support team,

Our customer is now evaluating using ADS52J90EVM.
The register 0x173 of LMK04826 can not be written with the GUI software of ADS52J90EVM.

I have two questions.

1. What is the POR DEFAULT value of register 0x173 of LMK 04826?
2. How can I change the register value of 0x173 in the GUI of ADS52J90EVM?

Best regards,
M. Tachibana

  • In reply to Olu Sodipe:

    Hi Olu-san,

    I'm sorry to my late reply.

    Our customer tried register settings that you taught, but no output signal appeared at all.
    We do not know what is the problem.
    Could you please check whether it works with the config file attached this thread in your evaluation environment?

    Best regards,
    M. TachibanaADS52J90_20170509.cfg

  • In reply to Masanori Tachibana:

    Hi Olu-san,

    How is the situation?
    The customer and I are waiting for your reply.

    3823.ADS52J90_20170509.cfg

    Best regards,
    M. Tachibana

  • In reply to Masanori Tachibana:

    Hi Masanori-san,

    When you say that no output signal appeared at all, do you mean that there was no clock output? No SYSREF output?

    Your PLLs should be locked with the desired clock frequencies if you modify the LMK's registers as I explained in my last post after running your attached script.

    Sincerely,

    Olu

  • In reply to Olu Sodipe:

    Hi Olu-san,

    Yes, there was no clock output and SYSREF output, even though PLL1 and PLL2 are locked.
    (D3 and D4 of LEDs light up.)

    The registers have been changed as you taught.
    I want you to check whether you get expected output  in your evaluation environment using the config file attached to the previous post.

    Best regards,
    M. Tachibana

  • In reply to Masanori Tachibana:

    Tachibana-san,

    The config file you attached has not had its register setting changed as I recommended. Registers x100, x102, x103..etc do not have the values I wrote in my response. They are still default 12b mode values from the HMC-DAQ scripts folder.

    Sincerely,
    Olu
  • In reply to Olu Sodipe:

    Hi Olu-san,

    I apologize for uploading a different config file.
    I will reupload the config file that did not work in the customers environment.

    ADS52J90_16ch_SINE_4L_12x_12b_GBLCLKDIV1_FSDIV3_SYSREFDIV24_20x.cfg


    Could you please check in your evaluation environment?

    Best regards,
    M. Tachibana

  • In reply to Masanori Tachibana:

    Hi Masanori-san,

    I just ran your script in my evaluation environment and just as you said, the PLLs lock, LEDs D3 and D4 light up. I am also able to observe 72MHz signals on TP4 and JP40 plus the appropriate SYSREF signal on TP9.
    Regardless of your RX configuration, you should be able to verify those signals coming out of the ADS52J90 EVM.

    Sincerely,
    Olu
  • In reply to Olu Sodipe:

    Hi Olu-san,

    Thanks for your checking quickly.

    When our customer run with the config file, output signals are seen for a moment , and after then no signal is seen at all.
    What is the difference from your evaluation environment?

    What version of the GUI is yours?
    The customers version is as follows.
        ADS52J90 EVM
        Version 2.8
        Builddata 11/04/2015

    And is there a relation with the revision of ADS 52J90 EVM?

    Best regards,
    M. Tachibana

  • In reply to Masanori Tachibana:

    Hi Masanori-san,

    That is the right version of HMC-DAQ GUI and there is no relation or issue with board revisions for the ADS52J90 EVM.

    I think at this point you need to debug the LMK to verify full board functionality. Try these steps;

    • Can you probe the LMK's pins directly to see whether it generates the clock signals as expected? Use the device diagram from its datasheet here.
    • If still no signals, go to the original register configuration I showed you for a 125MHz SYSREF and check for signals again.
    • If still none, use the default LMK configuration when it is in bypass mode and check to see if the ADC clock and GTX clocks are divided/passed from an external clock as expected.
    • If you can't still see any signals, check the EVM's SPI lines and make sure the LMK is powered up.

    That should help narrow the problem down a bit.

    Sincerely,

    Olu