ADS5263: ADC performance

Max Han

Part Number: ADS5263

In ADS5263 block diagram, it shows that a 14 bit ADC is integrated, but ADS5263 can be programed to 16 bit high SNR mode, how to use a 14 bit ADC to achieve 16 bit performance?

2. In ADS5263 datasheet, SNR performance is listed, customer think that clock will influence SNR a lot, so what’s the requirement for Clock? Such as jitter. What’s the Clock condition when we test SNR in datasheet? Such as frequency, jitter.

over 6 years ago

0 Olu Sodipe over 6 years ago

TI__Expert 4145 points

Hi Max,

We have received your query and we will get back to you by the end of this week. We apologize for the delay.

Sincerely,
Olu

0 Olu Sodipe over 6 years ago in reply to Olu Sodipe

TI__Expert 4145 points

Hi Max,

The ADS5263 uses a pipeline ADC split into multiple stages. The circuitry for the last 2bits (LSbs) or final stage of the pipeline can be powered up on an as-needed basis to improve the resolution and SNR of the ADC.

To answer your 2nd question, we typically recommend a clock source with 1ps jitter.

Sincerely,
Olu