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AFE5809: AFE5809 EVM TESTING

Part Number: AFE5809

I am trying to connect and test AFE5809 evm . I am trying to capture LVDS ouput from AFE5809 with a ZYNQ FPGA board . I tried to give test patterns from AFE5809 GUI , but except for all 1's and all 0's ,the waveform patterns are not getting correctly .When I gave toggle pattern,I am getting traingluar waveform . I tried to give sinusoidal signal of 200khz from funvction generator but I am not able to see it in adc Output.

Attaching the screenshots of various waveforms I tried.

Can anyone kindly help to resolve issue?

  • Hi Vasanth,

    Can you provide your register configuration?
    Based on the data from the Toggle pattern test mode, it seems like D12 and D13 bits of channel 1 are offset by 1 clock cycle compared to D0 through D11.
    Additionally can you run the ramp pattern test mode and check the channel data for bit alignment?
  • figure 4 in the attached screen shots is for ramp pattern. Do I want to configure registers also from GUI to run all these test patterns? I have not done any register write while doing test pattern analysis(worked with default config)..opened the GUI, checked whether its is ready to accept new command and then i am clicking on different patterns of the waveform from ADC page of GUI.

    I have checked the register configuration also..when i am clicking on ramp pattern at GUI ,in register access windows it is showing reg 0x2 is to be loaded with value 0xA000 and i used to click on write button after enabling readout mode..WHich is correct as per data sheet. so I m not able to find any mistakes .attaching the GUI configurations also..

  • Hello Vasanth,

    The operations you are performing on the AFE5809 GUI seems valid. Also it seems like there is no issue with the hardware and it looks more like an FPGA firmware issue and we suggest that you have a look at the application note on the LVDS capture.

    www.ti.com/.../sbaa205.pdf