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TI Home » TI E2E Community » Support Forums » Applications » Motor Drivers » Motor Drivers Forum » DRV8301 always in DVDD FAULT
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DRV8301 always in DVDD FAULT

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Hans-Dieter Schondelmaier
Posted by Hans-Dieter Schondelmaier
on Feb 25 2012 03:47 AM
Prodigy60 points

Hi all,

I work with a DRV8301 driver to predrive a 3-ph. full bridge, driving an BLDC motor.

On our PCB we don't use the interal buck controller of the DRV8301, that means, we have no external hardware connected on PVDD2, COMP, PH, RT_CLK, SS_TR, ... Only EN_BUCK is tied to GND.

We do that, because ti predict the independency of the rest of the driver behaviour!

If I communicate via SPI with the DRV8301, I get no errors, but the Fault-Pin goes low approx. 400µs after a Powerup/Reset. Pin switch alway to low, with or without SPI communication.

DVDD pin has definitly a undervolage: 0,74V were measured

Page 5 of datasheet shows no connection between DVDD and the buck converter.

Is there really no connection between buck converter and DVDD.

Is it allowed to disable the buck converter only by setting th EN_BUCK input to GND?

Does the DRV8301 work correct without using the buck converter???

Best Regards

Hans-Dieter

DRV8301 Fault DVDD buck converter
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  • Ryan Kehr
    Posted by Ryan Kehr
    on Feb 27 2012 16:07 PM
    Genius13785 points

    Hans-Dieter,

    There is absolutely no connection between the buck regulator and gate driver other than a shared GND connection.  

    It is completely normal and part of the start-up process.  I have attached a plot that shows what you are seeing after EN_GATE goes high.  EN_GATE goes high and approximately 414us later, the FAULTn pin cycles low while the device goes through start-up.  After 2.18ms, the FAULTn cycles back high.  After FAULTn goes back high, the DRV8301 is ready to receive PWM inputs.  

    In the tabular data, we specify the ready time as 5ms.  This is conservative as you can see it is more like 2.6ms in the plot I attached.  

    Ryan Kehr

    Motor Drive Application Manager

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  • Hans-Dieter Schondelmaier
    Posted by Hans-Dieter Schondelmaier
    on Mar 01 2012 11:43 AM
    Prodigy60 points

    Hello,

    thank you for that information.

    I found 2 misstakes in our pcb.

    1. The GND of our DVDD-capacitor had no connection to other GNDs.

    2. We tied our AVDD to Ref-pin and to the AVDD-out, but AVDD is an output itself.

    After this correction, sometimes I get my PWM signals at the outputs. But there are a lot of times, were FAULT is low and so PWM is disabled.

    My SPI configuration for DRV8301 is: Addr. 0x2: => 0x17F0 and Adr. 0x3: => 0x1820

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  • Ryan Kehr
    Posted by Ryan Kehr
    on Mar 01 2012 16:15 PM
    Genius13785 points

    Hans-Dieter,

    The GND connection for the decoupling capacitors on AVDD, DVDD, and GVDD are critical for proper operation.  

    The capacitors need to have a short connections back to the PowerPAD GND (this is the exposed tab underneath the package.  Also, this PowerPAD connection must be SOLDERED to the PCB.  This is a very important GND connection for the device.  

    Finally, close decoupling should also be provided on the PVDD1 pin as shown in the schematic in the datasheet.  

    Please check all these connections.

    Ryan Kehr

    Motor Drive Application Manager

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  • Hans-Dieter Schondelmaier
    Posted by Hans-Dieter Schondelmaier
    on Mar 02 2012 05:01 AM
    Prodigy60 points

    It looks like a very sensitive device, isnt it?

    Up to which power is the DRV8301 able to drive motors?

    I try to control a 28V/5A BLDC motor. There are lots of noise arount the FET switches!!!!

    Actually, PWM output works without connecting the motor coils. If I connect the coils to the full bridge, PWM works for 270µs, then FAULT pin goes low for 800µs periodically.

    How meas the DRV8301 a current? With the internal current amplifier or via SL_A, SL_B and SL_B voltages?

    What's about the SL_A, SL_B and SL_C inputs. Our FET bridge has only 1 shunt resistor, so SL_A, SL_B and SL_C are connected at the same node. Could this be a problem?

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  • Hans-Dieter Schondelmaier
    Posted by Hans-Dieter Schondelmaier
    on Mar 06 2012 05:36 AM
    Prodigy60 points

    Hi all,

    what a active forum ....

    I found out, my DRV8301 destroys the deadtime of the input signals.

    I have configured 6 independent signals and the external Deadtime resistor is 0Ohm. The microcontroller generates a deatime of 1,0µs by a 20kHz PWM, this should be enough. In other application I worked with 300ns.

    Well, what wrong with the DRV8301, that it cannot get though the PWM signals ???

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  • Ryan Kehr
    Posted by Ryan Kehr
    on Mar 06 2012 09:30 AM
    Genius13785 points

    Hans-Dieter,

    There should be no problem with 1.0us deadtime as long as you are in 6-input mode as defined by control register 0x02, bit 3.  Please define what you mean by "destroy".

    It seems you are having a lot of issues with the device.  I don't know anything about your project, ramp rate, motor, etc., but if there is time in your schedule than I would suggest ordering an evaluation kit to help with your design.  You can at least rule out layout issues with the evaluation board as we have optimized that. 

    DRV8301-HC-C2-Kit

    http://www.ti.com/tool/drv8301-hc-c2-kit

    Ryan Kehr

    Motor Drive Application Manager

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  • Hans-Dieter Schondelmaier
    Posted by Hans-Dieter Schondelmaier
    on Mar 07 2012 09:25 AM
    Prodigy60 points

    Hi Ryan,

    "destroy" means, there is no dead time anymore available between highside gate and lowside gate signals . Highside and Lowside Gate were activated/deactivated at the same time.

    In my latest measurement I saw that the highsides have no dead time! Lowsides are switched correct.

    The osci plot shows:
    yellow = Highside PWM input signal at pin 17
    green =  lowside PWM input signal at pin 18

    blue = Highside PWM out, pin 47
    red = Lowside PWM out, pin45

    Is there something wrong with the bootstrap voltage? All highside outputs (blue signal curve) have dangerous dead times, means rising and falling edges are with ramps or plateaus.

    Is there a connection between the bootstrap of this PWM outs and the bootstrap of the buck converter? Remember, our buck converter is not used.

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  • Ryan Kehr
    Posted by Ryan Kehr
    on Mar 07 2012 17:25 PM
    Genius13785 points

    Hans-Dieter,

    Your measurement of the inputs and low-side PWM output looks normal and voltages look normal.  However, your measurement of the high-side needs to be taken between pin 47 (high-side output) and the source of the corresponding FET using a differential probe.  This signal is not ground referenced.  This will give you an accurate measurement of what the high-side control signal is doing.

    Ryan Kehr

    Motor Drive Application Manager

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  • Hans-Dieter Schondelmaier
    Posted by Hans-Dieter Schondelmaier
    on Mar 08 2012 08:04 AM
    Prodigy60 points

    Ryan,

    yes you are right. Source-Pin of the Highside-FET has an level shift during dead time. With differential probe, the gate signals of the highsides seem to be OK.

    Now I have no ideas, why the FAULT pin switchs off the PWM outputs.

    ???

    Below the PWM-output of the DRV8301:

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  • Ryan Kehr
    Posted by Ryan Kehr
    on Mar 08 2012 09:35 AM
    Genius13785 points

    Hans-Dieter,

    I looked back at your register settings and it appears you are disabling the OC protection, so we can rule that out.  

    You still haven't posted your schematic, so I can't check that.  I also don't have any idea what your layout looks like or if you have properly grounded the PowerPAD (exposed pad on the bottom of the IC).  Please verify this.  You also need to probe all the voltages on the IC because /FAULT will cycle low on under-voltage conditions and automatically recover as you are seeing....please see Table 1 in the datasheet for a list of the conditions that would cause a fault reporting, but NOT latch.  

    Did you replace the IC after you discovered you were driving the AVDD output externally?  If that pin got over-voltaged, there would be a chance of internal damage.  

    Ryan Kehr

    Motor Drive Application Manager

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