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i need help with DRV8432 all modes

All, I am both the hw and sw designer for a new project and the TI DRV8432DKD is not working well for me at all. I have many questions and need to open up an on-going question/answer session with a tech guru. i am trying to drive a piston and not a motor and not getting good results. but before everything here are some of my "little" annoying questions that i am carrying around and need answered (after reading full data sheet many times ... this is just not my field): 1A) in cycle-by-cycle mode do the fault and otw lines go low for overcurrent or over temperaturre problems or does the 8432 handle the faults internally and not need user to toggle the reset line from high to low to clear the fault and get things working again? 1B) is the current limit resistor completely ignored in the CBC mode? so if i have one there it does not have any effect? 2) in the OC mode i see the fault and otw lines do yes go low for fault conditions but then must I wait or is it only good practice to wait 1.000 seconds before i toggle the reset line or can i toggle the reset line within the first 135nsec time once my sw senses a low on fault or otw line? Also if i have to do a reset to clear a fault then how long does the reset pulse have to stay low? Would a low pulse width of 135nsec duration be too short of a low pulse? 3) we are using the TI DRV8402DKD on older projects ... for my new project should i stay with the 8402 or move to the 8432? (My problem is that the Parallel full bridge with OC latching shutdown (mode: 011) is NOT supported by the 8432 and we make lots of use of it in the project for the 8402). When is the End-of-Life for the 8402 part? why is it not recommended for new design, is there something wrong with the part? Thanks in advance, Regards, Steve Dunn Electronics Engineer R&D Department Medispec Ltd. 40 Hataasiya Street Yehud, Israel 56101 Tel: 073-247-0903 Fax: 03 632-2099 Mobile: 057-779-1610 E-mail: steve@medispec-int.com
  • Hi Steve

    Sorry about your trouble on moving into DRV8432. But this device should be a good replacement for your application. About your questions, I give some comments first:

    1) Cycle-by-cycle mode need continual input PWMs (or just pulses) to maintain the CBC mechanism. nfault will not be tripped with the setting limit in CBC mode unless the current hit the second level with about 6A+ of the setting value.

    2) it is not recommended to toggle reset frequently as kind of a normal operation at OC latch mode when nfault tripped. The OC latch mode should be a protection method worked when outputs short or abnormal conditions with danger to the application.

    I just attached inputs configuration in CBC mode for most applications for your reference. if still problem here, I think you can put your schematic or layout, motor parameters, and working conditions here for us to debug your problem.

    About DRV8402, I think it is an old device that not to be continued. It is better to switch the design to current devices. I will try to get some internal suggestions for your question about DRV8402.

    Thanks.

    Wilson Zuo

    Motor Application Team

  • Wilson, hi thanks for the reply. here are my follow questions to your replies per your order above: 1) Cycle-by-cycle mode need continual input PWMs: when i setup CBC (000 and not 011) i operate the AB dual bridge by putting a waveform on pwmA while at same time holding pwmB constant low. and then to reverse motor direction i operate the opposite side of this AB dual bridge by putting a waveform on pwmB while at same time holding pwmA constant low. Is this correct operation? I do not understand your waveforms in your reply at all. meaning, if you put pwmB 180 degrees out of phase with pwmA, then would this not produce the motor to turn on in cw direction then when waveform changes the motor would turn on in ccw direction so in efffect motor has not moved at all. correct? what do you mean by driving fast decay synchronous? and how does the waveform perform this exactly? same for your other graphs. maybe refer me to a primer of motors so i can get into the subject before trying to fit the TI part into the operational side of things. 2) again i ask what is the minimum time i should hold down the reset line low before setting it to high (to clear the fault and start 8432 to work again) in OC mode?? thanks, steve
  • Wilson, i attach a pdf of the el. sch i am using plus the actuator load. any suggestions? steve
    Design1.pdf
  • Hi Steve

    1) When you holding PWMA or PWMB constant low, if the current limit is reached, you will have the problem that no nFAULT but the driver blocked. Please use following method:

    Forward driving: PWMA (MIN-duty% to 99%), PWMB (constant 1%)

    Reverse driving: PWMA (constant 1%), PWMB (MIN-duty% to 99% )

    The key is to keep both PWMA and PWMB have pulses all the time.

    2) Still not recommended. With solution in 1), you will have no need to do this reset at OC latch. CBC is your best choice.

    Thanks.

    Wilson Zuo

     

  • Hi Steve

    Interesting actuator load, is it a motor and gearbox inside or just a solenoid and magnetic?

    I think you will have your problem solved with my previous answer.

    Thanks.

    Wilson Zuo

  • Wilson, I attach here the datasheet for this actuator load. part number: TLG11-AA210. I believe it to be a motor that drives a solenoid. Could you pls read it and tell me what exactly it is? I do know from the manuf that this actuator piston has its own current limit disconnect limits. could you pls take a look at data sheet and tell me if it is a problematic load to drive with the DRV8432? here is what the manuf SKF told me in an email: "The current-cut off function is working as follows: If the pillar reaches the mechanical end switches the pillar is blocked and therefore the motor current goes up. If the current goes over a detected level the motor will be switched off by an electronic board. If you start again the current will be checked if it is under that current- cut off level." of course with PWM the current-cut off function works not in the right way. It needs constant current means constant voltage to detect the right over current. Here is the schematic: (i do not see the Paste from Word" button, where is it here??) i attach it as a file as well. thanks, steve
    FW TLG11-AA310.msg
  • here is data sheet for the actuator load i am using. steve
    ACTUATOR USED TLG11_AA210 MANUF SKF.pdf
  • Wilson,

    pls explain further what you mean above when you say:

    you will have the problem that no nFAULT but the driver blocked

    and therefore if i hit OC condition then the device will burn up or self destruct because it does not have its protection on because i not give the 1% pwm to the pwmb if pwma is running at 97% duty cycle and visa-a-versa?

    -Steve

  • Wilson,

    in your response to me above pls explain further what you mean by Driving Fast Decay Synchronous and Driving Slow Decay Synchronous?? I do not see these terms in the DRV8432 data sheet. Is this some kiind of basic motor driving talk for electronics?

    what is decaying exactly? current decaying? what is synchronous to what?

    is the nRESET_AB signal active high or low? so in diagram is there a fault condition that is causing the nRESET_AB to go high or low?

    -STeve

  • Hi Steve,

    I'm just replying some of your questions first.

    Decay means current decaying of the inductive load.

    Synchrounous means the in fast or slow decay, the decay current is taking path through the MOSFETs (Intentionally turned on during the decay/recirculation time) other than the body diodes of the MOSFETs. 

    nRESET_AB signal is active LOW. And this is an input signal given by our external controller just like PWM_x, not affected by the fault condition.

    I will get back tomorrow for your other questions.

    Best regards,

  • Hi Steve,

    Without the narrow pulse on the other PWM input, the device will just stop driving and keep in the last OC protection state. No burn up or self destruct, and just the current is decaying to zero with no automaticly recover. Please refer to the figure 6 and 7 in datasheet. If both the PWM_x inputs are keeping switching, the normal driving current will be recovered in the next PWM duty cycle.

    Best regards,