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Hi Steve
Sorry about your trouble on moving into DRV8432. But this device should be a good replacement for your application. About your questions, I give some comments first:
1) Cycle-by-cycle mode need continual input PWMs (or just pulses) to maintain the CBC mechanism. nfault will not be tripped with the setting limit in CBC mode unless the current hit the second level with about 6A+ of the setting value.
2) it is not recommended to toggle reset frequently as kind of a normal operation at OC latch mode when nfault tripped. The OC latch mode should be a protection method worked when outputs short or abnormal conditions with danger to the application.
I just attached inputs configuration in CBC mode for most applications for your reference. if still problem here, I think you can put your schematic or layout, motor parameters, and working conditions here for us to debug your problem.
About DRV8402, I think it is an old device that not to be continued. It is better to switch the design to current devices. I will try to get some internal suggestions for your question about DRV8402.
Thanks.
Wilson Zuo
Motor Application Team
Hi Steve
1) When you holding PWMA or PWMB constant low, if the current limit is reached, you will have the problem that no nFAULT but the driver blocked. Please use following method:
Forward driving: PWMA (MIN-duty% to 99%), PWMB (constant 1%)
Reverse driving: PWMA (constant 1%), PWMB (MIN-duty% to 99% )
The key is to keep both PWMA and PWMB have pulses all the time.
2) Still not recommended. With solution in 1), you will have no need to do this reset at OC latch. CBC is your best choice.
Thanks.
Wilson Zuo
Hi Steve
Interesting actuator load, is it a motor and gearbox inside or just a solenoid and magnetic?
I think you will have your problem solved with my previous answer.
Thanks.
Wilson Zuo
Wilson,
pls explain further what you mean above when you say:
you will have the problem that no nFAULT but the driver blocked
and therefore if i hit OC condition then the device will burn up or self destruct because it does not have its protection on because i not give the 1% pwm to the pwmb if pwma is running at 97% duty cycle and visa-a-versa?
-Steve
Wilson,
in your response to me above pls explain further what you mean by Driving Fast Decay Synchronous and Driving Slow Decay Synchronous?? I do not see these terms in the DRV8432 data sheet. Is this some kiind of basic motor driving talk for electronics?
what is decaying exactly? current decaying? what is synchronous to what?
is the nRESET_AB signal active high or low? so in diagram is there a fault condition that is causing the nRESET_AB to go high or low?
-STeve
Hi Steve,
I'm just replying some of your questions first.
Decay means current decaying of the inductive load.
Synchrounous means the in fast or slow decay, the decay current is taking path through the MOSFETs (Intentionally turned on during the decay/recirculation time) other than the body diodes of the MOSFETs.
nRESET_AB signal is active LOW. And this is an input signal given by our external controller just like PWM_x, not affected by the fault condition.
I will get back tomorrow for your other questions.
Best regards,
Hi Steve,
Without the narrow pulse on the other PWM input, the device will just stop driving and keep in the last OC protection state. No burn up or self destruct, and just the current is decaying to zero with no automaticly recover. Please refer to the figure 6 and 7 in datasheet. If both the PWM_x inputs are keeping switching, the normal driving current will be recovered in the next PWM duty cycle.
Best regards,