I am trying to set the over-current limit by programming the OC_ADJ_SET bits in the Control Register 1. However, I am seeing some strange things where I get less over-current faults at lower numbers and more over-current faults at higher numbers, which is opposite what the Table 9 says in the datasheet.
I’m thinking that maybe I have the bits reversed for the D6-D10 bits. In other words, for table entry # 6 (0.123), in binary that is 00110. Does that mean D6=0 D7=1 D8=1 D9=0 D10=0 -- OR -- D6=0 D7=0 D8=1 D9=1 D10=0?
Please advise and thank you.
