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DRV8303 dv/dt

PAN-M
Mastermind 8375 points
Other Parts Discussed in Thread: CSD18537NQ5A, DRV8303

Dear all.

  1) Slew rate (dV/dt) is too high (with DRV8303 and CSD18537NQ5A).

      As a result of this, EMI issue occurs.

 

  2) So, we shall change slew rate (dV/dt) by external gate register value for EMI reduction.

      But, if we change dV/dt, unintended OC event occurs.

      We shall adjust “OC detection timing” internal DRV8303.

 

      Pls tell us how to adjust “OC detection timing” and which timing DRV8303 checks Vds.

 

　* We know that the overcurrent protection event will be enabled when the Vds exceeds a pre-set value IOC.

      And the OC tripped value can be programmed through SPI command.

 

   DRV8303 Control resistor settings

      GATE CURRENT : 0.25A

      GATE RESET : Normal

      PWM MODE : Three independent inputs

      OC MODE : Latched shut down when OC detected

      OC_ADJ_SET : T.B.D.

      OCTW_SET : OC and OT

      GAIN : 10

Regards,

PAN-M

  • 0
    TI__Mastermind 26065 points

    Hi Pan

    I think your issue is caused by adding gate resistor, then the MOSFETs fully turning on time became longer, so that at the OC detecting time (1.5us after inputs active), the Rdson is not as low as the fully turning on.

    What is your gate resistor used now? You can try lower the gate resistor value and also you can set gate current higher when there is gate resistor presented. Since the MOSFETs has small Qg as 14nC, you can also try to add external caps from gate to source to lower the EMI caused by fast slew rate. DRV8303 always can give the extra output capability to the caps. Lower the PWM frequency is also an operation.

    Also it is recommended to use cycle-by-cycle (CBC) mode in most motor applications with high current needs, so that in real condition the system could run without interrupted and latched off by noise or load change.

    Best regards,