DRV8305: Protection features

Hi Yamamoto-san,

We will investigate and reply soon.

Hi Duncan-san,

Thank you for you support.
How is your progress?
Could you inform me ASAP?

Best regards,

Hi Yamamoto-san,

The word "Error" in this specification is intended to mean once an fault is detected that would result in all the gates being turned off, their is an average propagation delay of 1us between when the event is detected by our part and the FET gates are pulled low.

We reviewed this internally and found that the DRV8305 datasheet has two incorrect specifications on this line item. Please refer to the DRV8305-Q1 for the correct specification on both 'tpd,E-L' and 'tpd,E-SD' .

I'm currently looking into Min / Max for these different values.

Hi Beard-san,

Thank you for your reply, and I understand that I should refer to the DRV8305-Q1 datasheet about 'tpd,E-L' and 'tpd,E-SD'.

And thank you for your investigation, and could you inform me by when you could answer about Min / Max of 'tpd,E-L', 'tpd,E-SD' and 'VDS_trip'?

Best regards,

Hi Beard-san,

Thank you always your help.

How is your progress?
Could you inform me by when you could answer about Min / Max of 'tpd,E-L', 'tpd,E-SD' and 'VDS_trip'?
And if you could, please inform me as soon as possible.
*If there are no data, please tell me that.

Best regards,

Hi Beard-san,

Could you inform us when you could answer?
It is OK that data is reference value (not guaranteed).

Or, are there no data?
Best regards,