VISION- SDK2-12 Jacinto6- dra7xx - Run VPS application in M4 core via CCS

Gokul,
We are looking into this and will keep you posted.
John

Hi John

I am getting below error while building bsp-examples. Can you please support on this ?

ti_components\drivers\bsp_01_07_01_17\

Environment: VISION SDK 2-12 version,
Platform= dra7xx


gmake -s examples PLATFORM=dra7xx-evm


"lld_hsi2c.c", line 648: error: identifier "LLD_I2C_EDMA_CHA_I2CTXEVT0" is undefined
"lld_hsi2c.c", line 650: error: identifier "LLD_I2C_EDMA_CHA_I2CRXEVT0" is undefined
"lld_hsi2c.c", line 655: error: identifier "LLD_I2C_EDMA_CHA_I2CTXEVT1" is undefined
"lld_hsi2c.c", line 657: error: identifier "LLD_I2C_EDMA_CHA_I2CRXEVT1" is undefined
4 errors detected in the compilation of "lld_hsi2c.c".


Thanks
Gokul

Thanks Rishabh.

We are able to build with gmake -s examples PLATFORM=tda2xx-evm.

Sometimes , i  get the below error. while connecting to target.

Error connecting to the target:
(Error -230 @ 0x0)
The measured lengths of the JTAG IR and DR scan-paths are invalid.
This indicates that an error exists in the link-delay or scan-path.
(Emulation package 6.0.576.0)

What may be the cause ? How to avoid that ?

Thanks,

Gokul

Hi Rishabh,

Please let me know the version to update the package ? My CCS version

Code Composer Studio

Version: 7.1.0.00015

I am getting below error while running  Display application

Couldnot Load buffer from SD card.

waiting for 1 min to load buffer from scripting consolePress any key (in UART console) after loading buffer

loadRaw(0x80e00000, 0, "C:\\display_yuyv422_prog_packed_1920_1080.tigf", 32, false);

Load 4 BGR24_888 video frames of size 1920x1080 to location: 0x81dd2000

How to provide the input-file to buffer ?

Thanks

Gokul

Looks like latest Emulation package version is 6.0.579.0. Go ahead and update from Help->Install new software select "All available sites", scroll down to TI Emulators and update it from there. See sample screenshot: 

Thanks,

Alex

Hi
I am getting below error while running Display application

Couldnot Load buffer from SD card.

waiting for 1 min to load buffer from scripting consolePress any key (in UART console) after loading buffer

loadRaw(0x80e00000, 0, "C:\\display_yuyv422_prog_packed_1920_1080.tigf", 32, false);

Load 4 BGR24_888 video frames of size 1920x1080 to location: 0x81dd2000

How to provide the input-file data to the buffer ?

Thanks

Gokul

Hi Rishabh,

We have a customized dra7xx- jacinto6 board.  .

We are trying to run vision sdk display application  on our board.

We would like to display an image in LCD.

We have connected vout3 from DSS  to LCD. 

What are the steps involved in display bring up ?

We would like to know the configuration changes done from the application level .

What are the DispApp_TestParams to be configured ?

From the  source code, i understandthat  pinmux & LCD-panel configuration are needed,

Source-ref  : bsp_01_07_01_17\bsp_01_07_01_17\examples\vps\display\displayDss\src

/**

*  \brief Display application test parameters.

*  The test case execution happens based on values of this structure

*/

typedef struct

{

   Char            *testDescStr;

   /**< Test description. */

   UInt32           numEnc;

   /**< Number of Video Encoders to run with. */

   UInt32           encDrvId[VPS_DISP_ENC_INST_MAX];

   /**< Video encoder driver ID to open for each handle. */

   UInt32           vencId[VPS_DISP_ENC_INST_MAX];

   /**< Venc ID for each handle. */

   Fvid2_Standard   standard[VPS_DISP_ENC_INST_MAX];

   /**< Video encoder video standard. */

   UInt32           isSdVenc;

   /**< True for SD VENC and false for others. Valid only for Tda3xx. */

   UInt32           isRtParamUpdateTest;

   /**< True for RT Param Update testcases and false for others. */

   UInt32           numHandles;

   /**< Number of display handles to run with. */

   UInt32           instId[VPS_DISP_INST_MAX];

   /**< Instance ID to open for each handle. */

   Fvid2_DataFormat inDataFmt[VPS_DISP_INST_MAX];

   /**< YUV or RGB data format. */

   UInt32           inWidth[VPS_DISP_INST_MAX];

   /**< Input buffer resolution width in pixels. */

   UInt32           inHeight[VPS_DISP_INST_MAX];

   /**< Input buffer resolution height in lines. */

   UInt32           posx[VPS_DISP_INST_MAX];

   /**< Input buffer position x. */

   UInt32           posy[VPS_DISP_INST_MAX];

   /**< Input buffer position y. */

   UInt32           inScanFormat[VPS_DISP_INST_MAX];

   /**< In scan format. */

   UInt32           isFieldMerge[VPS_DISP_INST_MAX];

   /**< Field merge or field separated. */

   Int32            runCount;

   /**< Number of frames to display. */

   Bsp_BoardMode    boardMode;

   /**< Board mode param like 24-bit, 8-bit. */

   UInt32           boardId;

   /**< List of valid boards to run the test case. */

} DispApp_TestParams;

Thanks

Gokul

Hi Rishabh,

Thanks for the useful document.

1. The pixelclk frequency is 27 MHz. Whether i need to set the divisor to get lock?

2. We have connected vout3 from DSS to LCD.
I have given VPS_DCTRL_DSS_VENC_LCD3 in DispApp_TestParams .
Is it correct ?

3. if there are no encoders in DispApp_TestParams, can i assign to Zero ?

4 There are lot of parameters in DispApp_TestParams, which one is the simplest case ?
I am currently trying below case.
DSS Video1 (YUY422I) -> DPI3 -> LCD


Thanks & regards
Gokul

Hi Gokul,

I will consult the DSS expert on this and get back to you.

Regards,
Rishabh

Hi Brijesh,

1 We are able to set pixel clock via Bsp_platformSetPllFreq. as below.

There is no error in return value. 

vPllCfg.videoPll = BSP_PLATFORM_PLL_VIDEO1;
vPllCfg.pixelClk = 27000 * 4; /* In KHz */
retVal = Bsp_platformSetPllFreq(&vPllCfg);

2  But configuring the venc-clk source fails. 

How to set the venc-clock source?
vencClkCfg.outputVenc = BSP_PLATFORM_VENC_LCD3;
vencClkCfg.vencClkSrc = BSP_PLATFORM_CLKSRC_DPLL_VIDEO1_CLKOUT1;

retVal = Bsp_platformSetVencClkSrc(&vencClkCfg);

if(retVal != FVID2_SOK)
{
GT_0trace(BspAppTrace, GT_ERR,
APP_NAME ": Setting MS Venc clock source Failed!!!\n");
}

3, Also we have input files display_yuyv422_prog_packed_1920_1080.tigf & display_gbr888_prog_packed_1920_1080.tigf. for testing,which will be loaded into memory for displaying.

Do you have any  player in host machine to view the actual content of this file ?

Thanks & regards,
Gokul

Hi Gokul,


why are you multiplying 27KHz by 4? Do you divide this clock somewhere else?
These files are plain RGB888 or YUV422 files, you could open them in 7yuv by changing their extension to yuv or .rgb

Rgds,
Brijesh

Hi Brijesh,

Yes,we are using the  vencDivisor as 4 .

What may be the problem in configuring VENC clock source ?

Int32 m4_pll_config(DispApp_Obj *appObj)
{
Bsp_PlatformSetPllFreq vPllCfg;
Bsp_PlatformVencSrc vencClkCfg;
Int32 retVal = FVID2_SOK;
vPllCfg.videoPll = BSP_PLATFORM_PLL_VIDEO1;
vPllCfg.pixelClk = 27000 * 4; /* In KHz */
//vPllCfg.pixelClk = 27000 ; /* In KHz */

retVal = Bsp_platformSetPllFreq(&vPllCfg);

if(retVal != FVID2_SOK)
{
GT_0trace(BspAppTrace, GT_ERR,
APP_NAME ": Configuring MS Pll Failed!!!\n");
}

vencClkCfg.outputVenc = BSP_PLATFORM_VENC_LCD3;
vencClkCfg.vencClkSrc = BSP_PLATFORM_CLKSRC_DPLL_VIDEO1_CLKOUT1;

retVal = Bsp_platformSetVencClkSrc(&vencClkCfg);

if(retVal != FVID2_SOK)
{
GT_0trace(BspAppTrace, GT_ERR,
APP_NAME ": Setting MS Venc clock source Failed!!!\n");
}

/* Set the LCD PCD divisors */
Vps_DctrlVencDivisorInfo vencDivisors;
vencDivisors.vencId = VPS_DCTRL_DSS_VENC_LCD3;
vencDivisors.divisorLCD = 1;
vencDivisors.divisorPCD = 4;

retVal = Fvid2_control(appObj->dctrlHandle, IOCTL_VPS_DCTRL_SET_VENC_PCLK_DIVISORS,
&vencDivisors, NULL);

if(retVal != FVID2_SOK)
{
GT_0trace(BspAppTrace, GT_ERR,
APP_NAME ": Setting MS PCLK DIVISORs Failed!!!\n");
}

}

Thanks & regards

Gokul

Hi Brijesh,

We have changed the clock source to VIDEO1_CLKOUT3 and there is no error in setting venc-clk source.

we are able to get some data in Display with the image display_yuyv422_prog_packed_1920_1080.tigf, but still there is error in setting PLL.

Bsp_platformSetPllFreq(&vPllCfg); what may be  the cause for this error ? 

we are able to get data of the top-left-corner of the actual image (display_yuyv422_prog_packed_1920_1080.tigf).

Our LCD resolution 800 * 480. Is it possible to load an image for this resolution to get the exact output ?
What are the changes involved in vps-display-dss application for this ?

From my understanding i have to change the gDispDssLoadBufCfg parameters. Is it correct ? what is the pitch value ?

I tried with w-800 h -480 & pitch 1600. but i am not getting the expected output data in the display.

static const DispApp_LoadBufCfg gDispDssLoadBufCfg[] =
{
/* width, height, pitch, dataFmt, scanFmt, fieldsMerged, numBuffers */
{1920u, 1080u, 3840u, FVID2_DF_YUV422I_YUYV, FVID2_SF_PROGRESSIVE,
FALSE,
DISP_APP_MAX_FRAMES_PER_HANDLE},
{1920u, 1080u, 5760u, FVID2_DF_BGR24_888, FVID2_SF_PROGRESSIVE,
FALSE,
DISP_APP_MAX_FRAMES_PER_HANDLE},
};

Please let me know the changes involved for displaying 800 * 480 r image?

Also  what may be the problem in setting the PLL   ?

Thanks  & regards,

Gokul

Hi Gokul,

What pixel frequency you are trying to set? 

Yes, you need to change DispApp_LoadBufCfg gDispDssLoadBufCfg instance to change the load buffer size. 

what issue you are seeing on the display? Can you please check if input buffer is correct and it is loaded correct by reading it back?

Regards,

Brijesh