Other Parts Discussed in Thread: CCSTUDIO
Tool/software: Linux
Hi all,
We have custom daughter board + custom DRA722 CPU module board with uboot 2014.07 in glsdk 7.03.00.00.3 , but some our CPU modules which filter out by our MP line are bad.
Because those CPU modules can not boot up successfully , the boot log only print 4 lines.
U-Boot SPL 2014.07 (Apr 26 2017 - 16:16:36) DRA722-GP ES1.0 DPLL locking failed for 4a0052a8 ### ERROR ### Please RESET the board ###
So I tracked source code and found the problem is occurred on this function,
if (!wait_on_value(ST_DPLL_CLK_MASK, ST_DPLL_CLK_MASK, (void *)dpll_regs->cm_idlest_dpll, LDELAY)) { printf("DPLL locking failed for 0x%x\n", dpll_regs->cm_clkmode_dpll); hang(); }
Could you give us some direction to debug it ? ( it should be h/w issue , but we want to know which part is NG )
I'm looking forward to your reply, thank you.
Best Regards,
Bowe Ren