DRA725: DRA725，J6 ECO usb setting problem

Hi Judd,

what is the version of the SDK you use?

Regards,
Yordan

Hi Yordan,
Version is 3.02.00.03.

Hi Judd,

I have forwarded your question to an USB expert.

Regards,
Yordan

Hi Judd,

I'm not USB expert, but I would recommend you one easy step to debug. Try desoldering the ESD diodes and try again. Of course you should handle the board with care being unprotected.
Incompatible with USB diodes is a common issue when designing USB PCB.

Regards,
Stan

Hi Stan,

I had tried desoldering the ESD diodes and replaced the common mode choke with 0 Ω,but the condition was still exited.

Hi Stan,

Did you have more advices for our issues?

Hi Judd,
I'm sorry, I don't have other advices for hardware.
I just have recommendation for VBUS switch, but this is unrelated to your issue.
Place another 10uF in front of the VBUS switch. And also place 100k resistor so the output 10uF discharges faster at no load.

Hi Stan,

We tried to desoldering R0664,R0619 and pull the CE pin to high by 10K resistor,but not improve.
From the SCH,have you find some hardware problem?Could you help check our DRA725 SCH?

Judd,
I cannot find anything disturbing from hardware perspective on your schematic. (Except for what I already mentioned in my previous posts)
Last thing to check for hardware is whether D+/D- differential pair was routed per requirements for impedance, short traces with minimum vias and curves.

Hi Stan,
I tried to desoldering TVS,but not improve,but when we replaced TVS with 15pF/20pF MLCC,USB can work in HOST MODE by several minutes.
And 5pF/10pF can't work.It contradict USB protocol with low capacitance .I don't met this problem,could you have some thoughts?

Hi Judd,

I don't know why higher capacitance work better. This may be from an inappropriate differential lane routing, for example.

Did you measure the USB eye opening with a scope? If the vertical opening requires a little boost, it can be improved a little bit in the USB2PHY registers.