Part Number: TDA3
Hello,
The write speed of the QSPI interface is very slow, because the transfer is managed by the M4 CPU. To speed this up we are working on a transfer with chained EDMA instead of CPU.
The Transfer:
- EDMA writes data to the QSPI interface (QSPI_SPI_DATA_REG)
- EDMA triggers the transfer by writing to the QSPI interface (QSPI_SPI_CMD_REG)
- QSPI interface issues a interrupt to IRQ_XBAR
- The interrupt from QSPI should trigger the next EDMA transfer
I can't see a event to bind the QSPI interrupt to the DMA_CROSSBAR in the TRM.
Is there a solution to trigger the EDMA with the QSPI interrupt?
Am I missing something?
Why is the event missing?
Regards,
Simon