RTOS/TDA3XEVM: Integeration of PWM example program in main function of usecase

Can you describe what is wrong and where it is getting struck

Do you get interrupt?

Did you probe the pin and see if the PWM signals are toggling?

Can you share all the changes you have done? I can review if there are some gaps.

BTW you can't just integrate the PWM example as is to the VSDK.

The PDK example is baremetal and VSDK is based on TI SYSBIOS. So you should not take the OS related functions like startup, interrupt, cache etc from the PDK example to VSDK. You should take only the PWM CSL-FL programming to VSDK. For all above things you should use the SYSBIOS APIs.

Surendar,

Kindly share chains_main_bios_vision.c file where you have made changes. As Sivaraj pointed out you cant simply copy functions.

What is your end goal? Do you want to drive any external device using these PWM signals? When do you want to enable/disable that? 

Depending on above scenarios you need to put call your PWM functions from appropriate locations.

Hi Prasad,

Kindly find the chains_main_bios_vision.c file copied below  . I want to do a display brightness control using the PWM signal generated from the chains so I tried to integerate the PWM program into the main function . While adjusting the PWM duty cycle i wanted to control the brightness through the output pin.

in the below copied file I have added all the PWM functions which are necessary to geerate PWM . Kindly guide me on how to proceed with that .

/*******************************************************************************
 *  INCLUDE FILES
 *******************************************************************************
 */
#include <system_cfg.h>
#include <src/include/chains.h>
#include <src/include/chains_common.h>
#include <src/rtos/iss/include/iss_sensors.h>

/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */

#include "epwm_app.h"

/* ========================================================================== */
/*                                Macros                                      */
/* ========================================================================== */

/*
 * Configurable parameters
 */
/**
 *  \brief PWM instance base address.
 *
 *  Note: If changed to other instance, PRCM and pinmux changes needs to be
 *  taken care in the application.
 */
#define APP_EHRPWM_INST_BASE_ADDR       (SOC_PWMSS1_IPWMSS_BASE)

/**
 *  \brief Output channel - A or B.
 *
 *  Note: If changed to channel B, pinmux changes needs to be taken care
 *  in the application.
 */
#define APP_EHRPWM_OUTPUT_CH            (CSL_EPWM_OUTPUT_CH_A)

/** \brief Frequency of PWM output signal in Hz - 1 KHz is selected */
#define APP_EHRPWM_OUT_FREQ             (1U * 1000U)

/** \brief Duty Cycle of PWM output signal in % - give value from 0 to 100 */
#define APP_EHRPWM_DUTY_CYCLE           (25U)

/** \brief APP run time in seconds */
#define APP_RUN_TIME                    (30U)

/** \brief APP run count in event equal zero ISR count */
#define APP_RUN_TIME_ISRCOUNT           (APP_RUN_TIME * APP_EHRPWM_OUT_FREQ)

/**
 *  \brief Functional clock to the PWMSS.
 *  Fixed for the platform - can't be changed.
 */
#define SOC_EHRPWM_MODULE_FREQ          (133U * 1000U * 1000U)

/** \brief TB frequency in Hz - so that /4 divider is used */
#define APP_EHRPWM_TB_FREQ              (SOC_EHRPWM_MODULE_FREQ / 4U)

/**
 *  \brief PRD value - this determines the period
 *
 *  PRD = (TBCLK/PWM FREQ) / 2
 *  NOTE: /2 is added becasue up&down counter is selected. So period is 2 times
 */
#define APP_EHRPWM_PRD_VAL              ((APP_EHRPWM_TB_FREQ                   \
                                            / APP_EHRPWM_OUT_FREQ) / 2U)
/**
 *  \brief COMPA value - this determines the duty cycle
 *
 *  COMPA = (PRD - ((dutycycle * PRD) / 100)
 */
#define APP_EHRPWM_COMPA_VAL            (APP_EHRPWM_PRD_VAL -                  \
                                            ((APP_EHRPWM_DUTY_CYCLE *          \
                                                APP_EHRPWM_PRD_VAL) / 100U))

#define APP_EHRPWM_INT                  (32U)
#define APP_EHRPWM_XBAR_CPU             (CSL_XBAR_IRQ_CPU_ID_IPU1)
#define APP_EHRPWM_XBAR_INST            (CSL_XBAR_INST_IPU1_IRQ_32)
#define APP_EHRPWM_XBAR_INTR_SOURCE     (CSL_XBAR_PWMSS1_IRQ_ePWM0INT)

/* ========================================================================== */
/*                            Global Variables                                */
/* ========================================================================== */

/** \brief IP default configuration */
static CSL_EpwmAppPwmObj_t gAppPwmObj =
{
    APP_EHRPWM_OUTPUT_CH,                       /* pwmCh */
    APP_EHRPWM_INST_BASE_ADDR,                  /* instAddr */
    SOC_EHRPWM_MODULE_FREQ,                     /* funcClk */
    FALSE,                                      /* enableDeadband */
    FALSE,                                      /* enableChopper */
    FALSE,                                      /* enableTripzone */
    TRUE,                                       /* enableEventTrigger */
    FALSE,                                      /* enableHighResolution */
    /* CSL_EpwmAppPwmCfg_t*/
    {
        /* CSL_EpwmTimebaseCfg_t */
        {
            APP_EHRPWM_TB_FREQ,                 /* tbClk */
            APP_EHRPWM_OUT_FREQ,                /* pwmtbCounterFreqPrd */
            CSL_EPWM_TB_COUNTER_DIR_UP_DOWN,    /* tbCntrDirection */
            FALSE,                              /* enableSynchronization */
            PWMSS_EPWM_TBCTL_PHSDIR_COUNT_DOWN, /* cntDirAfterSync */
            0U,                                 /* phsCountAfterSync */
            PWMSS_EPWM_TBCTL_SYNCOSEL_EPWMXSYNC /* syncOutSrc */
        },
        /* CSL_EpwmCounterCmpCfg_t */
        {
            APP_EHRPWM_COMPA_VAL,               /* cmpAValue */
            APP_EHRPWM_COMPA_VAL                /* cmpBValue */
        },
        /* CSL_EpwmAqActionCfg_t */
        {
            CSL_EPWM_AQ_ACTION_DONOTHING,       /* zeroAction */
            CSL_EPWM_AQ_ACTION_DONOTHING,       /* prdAction */
            CSL_EPWM_AQ_ACTION_HIGH,            /* cmpAUpAction */
            CSL_EPWM_AQ_ACTION_LOW,             /* cmpADownAction */
            CSL_EPWM_AQ_ACTION_HIGH,            /* cmpBUpAction */
            CSL_EPWM_AQ_ACTION_LOW              /* cmpBDownAction */
        },
        /* CSL_EpwmDeadbandCfg_t */
        {
            CSL_EPWM_DB_IN_MODE_A_RED_A_FED,    /* inputMode */
            CSL_EPWM_DB_OUT_MODE_BYPASS,        /* outputMode */
            CSL_EPWM_DB_POL_SEL_ACTV_HIGH,      /* polaritySelect */
            0U,                                 /* risingEdgeDelay */
            0U                                  /* fallingEdgeDelay */
        },
        /* CSL_EpwmChopperCfg_t */
        {
            CSL_EPWM_CHP_DUTY_CYCLE_PERC_12PNT5,    /* dutyCycle */
            CSL_EPWM_CHP_CLK_FREQ_DIV_BY_1,         /* clkFrequency */
            CSL_EPWM_CHP_OSHT_WIDTH_1XSYSOUT_BY_8   /* oneShotPulseWidth */
        },
        /* CSL_EpwmTripzoneCfg_t */
        {
            CSL_EPWM_TZ_TRIP_ACTION_DO_NOTHING, /* tripAction */
            CSL_EPWM_TZ_EVENT_ONE_SHOT,         /* tripEvtType */
            0U,                                 /* tripPin */
            FALSE                               /* enableTripIntr */
        },
        /* CSL_EpwmEtCfg_t */
        {
            CSL_EPWM_ET_INTR_EVT_CNT_EQ_ZRO,    /* intrEvtSource */
            CSL_EPWM_ET_INTR_PERIOD_FIRST_EVT   /* intrPrd */
        }
    }
};

static volatile uint32_t gNumIsr = 0U;

/* ========================================================================== */
/*                 Internal Function Declarations                             */
/* ========================================================================== */

static void AppPwmIntrISR(void *handle);

static void CSL_epwmAppPwmCfg(CSL_EpwmAppPwmObj_t *pObj);
static void EpwmAppTimebaseModuleCfg(uint32_t baseAddr,
                                     uint32_t pwmFuncClk,
                                     CSL_EpwmTimebaseCfg_t *pTbCfg);
static void EpwmAppCounterComparatorCfg(uint32_t baseAddr,
                                        CSL_EpwmCounterCmpCfg_t *pCcCfg);

static void padConfig_prcmEnable(void);

/*******************************************************************************
 *  Globals
 *******************************************************************************
 */
Void Chains_showMainMenu(char *main_menu);
Void Chains_showSystemSettingsMenu();
Void Chains_menuRearViewPanoramaRun();
Chains_Ctrl gChains_usecaseCfg;

/**
 *******************************************************************************
 * \brief Menu setting display string.
 *******************************************************************************
 */
char gChains_menuUseCases[] = {
    "\r\n "
    "\r\n Vision SDK Usecases,"
    "\r\n -------------------- "
    "\r\n 1: Single Camera Usecases"
    "\r\n 2: Multi-Camera LVDS Usecases"
    "\r\n 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY)"
    "\r\n 4: Dual Display Usecases, (TDA2x EVM ONLY)"
    "\r\n 5: ISS Usecases, (TDA3x ONLY)"
    "\r\n 6: TDA2x Stereo Usecases "
    #ifdef UC_network_rx_tx
    "\r\n 7: Network RX/TX Usecases"
    #endif
    #ifdef RADAR_INCLUDE
    "\r\n 9: RADAR Usecases"
    #endif
    "\r\n a: Miscellaneous test's"
    #ifdef OPENCL_INCLUDE
    "\r\n b: OPENCL Usecases (TDA2x EVM ONLY)"
    #endif
    #ifdef OPENVX_INCLUDE
    "\r\n c: OPENVX Usecases"
    #endif
    #if defined(UC_rear_view_panorama_tda3xx)
    "\r\n d: Rear View Panorama Use-cases"
    #endif
    #ifdef BUILD_ADAM_CAR
    "\r\n e: ADAM Car Use-cases"
    #endif
    #ifdef UC_tidl
    "\r\n f: TIDL File I/O Usecase"
    #endif
    #ifdef UC_semSeg
    "\r\n g: Semantic Segmentation Usecase"
    #endif
    "\r\n "
    "\r\n s: System Settings "
    "\r\n "
    "\r\n x: Exit "
    "\r\n "
    "\r\n Enter Choice: "
    "\r\n "
};


/**
 *******************************************************************************
 * \brief Run Time Menu string.
 *******************************************************************************
 */
char gChains_runTimeMenu[] = {
    "\r\n "
    "\r\n ===================="
    "\r\n Chains Run-time Menu"
    "\r\n ===================="
    "\r\n "
    "\r\n 0: Stop Chain"
    "\r\n "
    "\r\n 1: Change Display Channel (Support 4CH LVDS + Mosaic use-case only)"
    "\r\n "
    "\r\n p: Print Performance Statistics "
    "\r\n "
    "\r\n Enter Choice: "
    "\r\n "
};

/**
 *******************************************************************************
 *
 * \brief   Main call for usecase selection and configuration
 *
 *          Chains_main is called form the main of main_ipu1_0.c .
 *          This is the entry point for usecase selection.
 *          Board, UART LCD initializations and demo selections are performed.
 *          It waits in a while loop till the end of demo/usecase is triggred
 *
 * \param   arg0    [IN]  default args
 *
 * \param   arg1    [IN]  default args
 *
 *******************************************************************************
*/
Void Chains_main(UArg arg0, UArg arg1)
{

    ChainsCommon_Init();
    Chains_Ctrl_Init(&gChains_usecaseCfg);

    
/**********************Added for PWM*******************************************/
    CSL_EpwmAppPwmObj_t *pObj = &gAppPwmObj;

    /* Do pad config amd PRCM enable for UART and PWM */
    padConfig_prcmEnable();
    /* Enable clocks for EPWM module inside the PWM sub system. */
    CSL_epwmClockEnable(pObj->instAddr);

    /* EPWM channel configuration */
      CSL_epwmAppPwmCfg(pObj);

    /* Wait for ISR count */
    while (gNumIsr < APP_RUN_TIME_ISRCOUNT);
/*******************************Added for PWM****************************************/












#if defined(TDA2EX_ETHSRV_BOARD)
    /*
     * For ETH SRV Board camera power is on by default, so turn it off.
     * Use-cases enable camera power in start function.
     */
    ChainsCommon_StopCaptureDevice( CHAINS_CAPTURE_SRC_TRULY_AVB_CAM );
#endif

    #ifdef TDA3XX_FAMILY_BUILD
    #ifdef UC_fast_boot_iss_capture_isp_simcop_pd_display
    if(System_isFastBootEnabled())
    {
        gChains_usecaseCfg.displayType   = CHAINS_DISPLAY_TYPE_LCD_10_INCH;
        gChains_usecaseCfg.captureSrc    = CHAINS_CAPTURE_SRC_AR0140BAYER_PARALLEL;
        gChains_usecaseCfg.ispOpMode     = ISSM2MISP_LINK_OPMODE_2PASS_WDR;
        gChains_usecaseCfg.issLdcEnable  = 0;
        gChains_usecaseCfg.issVtnfEnable = 0;

        if(Bsp_platformIsTda3xxFamilyBuild())
        {
            Chains_fastBootIssIspSimcop_pd_Display(&gChains_usecaseCfg);
        }
        else
        {
            Vps_printf(" ### Cannot run usecase. Usecase not supported on this platform or "
                       "     Check FAST_BOOT_INCLUDE in Rules.make \n");
        }
    }
    else if (System_isSrvFastBootEnabled())
    {
        gChains_usecaseCfg.captureSrc = CHAINS_CAPTURE_SRC_UB960_IMI;
        strncpy(
            gChains_usecaseCfg.sensorName,
            SENSOR_OMNIVISION_OV10640_IMI,
            ISS_SENSORS_MAX_NAME);
        Chains_issMultCaptIspDewarp3dSv_Display(
                                            &gChains_usecaseCfg,
                                            ALGORITHM_LINK_SRV_OUTPUT_3D_LDC);
    }
    else
    #elif defined(UC_iss_mult_capture_isp_dewarp_3dsv_tda3xx)
    if (System_isSrvFastBootEnabled())
    {
        gChains_usecaseCfg.captureSrc = CHAINS_CAPTURE_SRC_UB960_IMI;
        strncpy(
            gChains_usecaseCfg.sensorName,
            SENSOR_OMNIVISION_OV10640_IMI,
            ISS_SENSORS_MAX_NAME);
        Chains_issMultCaptIspDewarp3dSv_Display(
                                            &gChains_usecaseCfg,
                                            ALGORITHM_LINK_SRV_OUTPUT_3D_LDC);
    }
    else
    #endif
    #endif
    {
        #ifdef CHAINS_DISABLE_GET_CHAR
        Chains_menuMainRun('n');
        #endif
        {
            char ch;
            Bool done;

            done = FALSE;

            while(!done)
            {
                Chains_showMainMenu(gChains_menuUseCases);

                ch = Chains_readChar();

                Vps_printf(" \r\n");

                switch(ch)
                {
                    case '1':
                        Chains_menuSingleCameraRun();
                        break;

                    case '2':
                        Chains_menuMultiCameraLvdsRun();
                        break;

                    #ifdef AVB_INCLUDE
                    case '3':
                    if(Utils_netIsNetworkEnabled())
                    {
                        Chains_menuAvbRxRun();
                    }
                    else
                    {
                        Vps_printf(" ### Networking NOT enabled in build, Rebuild \
                               binaries  with NDK_PROC_TO_USE=<proc name> in Rules.make \n");
                    }
                    break;
                    #endif
                    case '4':
                        Chains_menuDualDisplayRun();
                        break;

                    case '5':
                        Chains_menuIssRun();
                        break;

                    case '6':
                        Chains_menuStereoRun();
                        break;
                    #ifdef UC_network_rx_tx
                    case '7':
                        Chains_menuNetworkRxTxRun();
                        break;
                    #endif
                    #ifdef RADAR_INCLUDE
                    case '9':
                        {
                            Void Chains_radarMain(Chains_Ctrl *chainsCfg);

                            Chains_radarMain(&gChains_usecaseCfg);
                        }
                        break;
                    #endif

                    case 'a':
                        Chains_menuMiscTestRun();
                        break;
                    #ifdef OPENCL_INCLUDE
                    case 'b':
                        Chains_menuOpenCLRun();
                        break;
                    #endif
                    #ifdef OPENVX_INCLUDE
                    case 'c':
                    case 'C':
                        Chains_menuOpenVXRun();
                        break;
                    #endif
                    #if defined(UC_rear_view_panorama_tda3xx)
                    case 'd':
                        Chains_menuRearViewPanoramaRun();
                        break;
                    #endif
                    #ifdef BUILD_ADAM_CAR
                    case 'e':
                        {
                            Void Chains_adamCarDemoMain(Chains_Ctrl *chainsCfg);
                            Chains_adamCarDemoMain(&gChains_usecaseCfg);
                        }
                        break;
                    #endif

                    #ifdef UC_tidl
                    case 'f':
                    case 'F':
                        chanis_tidl(&gChains_usecaseCfg);
                        break;
                    #endif

                    #ifdef UC_semSeg
                    case 'g':
                    case 'G':
                        chanis_semSeg(&gChains_usecaseCfg);
                        break;
                    #endif

                    case 's':
                    case 'S':
                        Chains_showSystemSettingsMenu();
                        break;

                    case 'x':
                    case 'X':
                        done = TRUE;
                        break;
                }
            }
        }
    }

    ChainsCommon_DeInit();
}





static void AppPwmIntrISR(void *handle)
{
    uint16_t status = CSL_epwmEtIntrStatus(APP_EHRPWM_INST_BASE_ADDR);

    CSL_epwmEtIntrClear(APP_EHRPWM_INST_BASE_ADDR);
    gNumIsr++;
    return;
}

/**
 * \brief   This API configures the ePWM module
 *
 * \param   pObj             pointer to the ePwm object data structure.
 */
static void CSL_epwmAppPwmCfg(CSL_EpwmAppPwmObj_t *pObj)
{
    uint32_t baseAddr = pObj->instAddr;
    uint32_t pwmCh    = pObj->pwmCh;
    uint32_t pwmFuncClk = pObj->funcClk;
    CSL_EpwmAppPwmCfg_t *pPwmCfg = &pObj->pwmCfg;

    /* Configure the Time base Sub-Module */
    EpwmAppTimebaseModuleCfg(baseAddr, pwmFuncClk, &pPwmCfg->tbCfg);

    /* Counter-Comparator Sub-Module Configuration */
    EpwmAppCounterComparatorCfg(baseAddr, &pPwmCfg->ccCfg);

    /* Configure Action Qualifier */
    CSL_epwmAqActionOnOutputCfg(baseAddr, pwmCh, &pPwmCfg->aqCfg);

    /* Dead band sub-module configuration */
    if (TRUE == pObj->enableDeadband)
    {
       /* Enable and configure dead band sub module */
       CSL_epwmDeadbandCfg(baseAddr, &pPwmCfg->dbCfg);
    }
    else
    {
        /* Bypass dead band sub module */
        CSL_epwmDeadbandBypass(baseAddr);
    }

    /* Chopper sub-module configuration */
    if (TRUE == pObj->enableChopper)
    {
        /* Configure chopper sub - module */
        CSL_epwmChopperCfg(baseAddr, &pPwmCfg->chpCfg);

        /* Enable Chopper */
        CSL_epwmChopperEnable(baseAddr, TRUE);
    }
    else
    {
        /* Disable Chopper */
        CSL_epwmChopperEnable(baseAddr, FALSE);
    }

    /* Trip Zone Sub-Module Configuration */
    if (TRUE == pObj->enableTripZone)
    {
        /* Configure the Trip action */
        CSL_epwmTzTriggerTripAction(
            baseAddr, CSL_EPWM_TZ_TRIP_ACTION_HIGH, pwmCh);

        /* Enable the Trip event */
        CSL_epwmTzTripEventEnable(
            baseAddr, pPwmCfg->tzCfg.tripEvtType, pPwmCfg->tzCfg.tripPin);
    }
    else
    {
        /* Disable trip zone event handling and ignore all trip zone events */
        CSL_epwmTzTripEventDisable(
            baseAddr, CSL_EPWM_TZ_EVENT_ONE_SHOT, pPwmCfg->tzCfg.tripPin);
        CSL_epwmTzTripEventDisable(
            baseAddr, CSL_EPWM_TZ_EVENT_CYCLE_BY_CYCLE, pPwmCfg->tzCfg.tripPin);
    }

    /* Event trigger sub - module configuration */
    if (TRUE == pObj->enableEventTrigger)
    {
        /* Configure the Event trigger processing */
        CSL_epwmEtIntrCfg(
            baseAddr, pPwmCfg->etCfg.intrEvtSource, pPwmCfg->etCfg.intrPrd);
        CSL_epwmEtIntrEnable(baseAddr);
    }
    else
    {
        /* Disable Event trigger interrupts */
        CSL_epwmEtIntrDisable(baseAddr);
    }

    /**
     * High resolution feature is supported only on PWM A channel. If channel
     * is A then proceed with High Resolution processing.
     */
    if (CSL_EPWM_OUTPUT_CH_A == pwmCh)
    {
        if (TRUE == pObj->enableHighResolution)
        {
            /* configure high resolution feature */
            CSL_epwmHighResolutionCfg(
                baseAddr,
                pPwmCfg->hrCfg.delayBusSelect,
                pPwmCfg->hrCfg.delayMode);

            if (CSL_EPWM_HR_DELAY_BUS_SEL_CMPAHR ==
               pPwmCfg->hrCfg.delayBusSelect)
            {
                /* Load comparator A High-resolution counter value */
                CSL_epwmHrLoadCmpAHrValue(
                    baseAddr,
                    pPwmCfg->hrCfg.cmpAHighResVal,
                    CSL_EPWM_HR_REG_ACT_LOAD_CNT_ZRO_PULSE);
            }
            else  /* CSL_EPWM_HR_DELAY_BUS_SEL_TBPHSHR */
            {
                /* Load Timebase phase high resolution value */
                CSL_epwmHrLoadTbPhaseHrValue(
                    baseAddr, pPwmCfg->hrCfg.tbPhaseHighResVal);
            }
        }
        else
        {
            /* Disable High Resolution Feature */
            CSL_epwmHighResolutionDisable(baseAddr);
        }
    }

    return;
}

/**
 * \brief   This API configures the Timebase Sub-module.
 *
 * \param   baseAddr        Base address of PWMSS instance used
 * \param   pwmFuncClk      PWM functional clock value in Hz
 * \param   pTbCfg          Pointer to the Time base sub-module configuration
 *                          data structure
 */
static void EpwmAppTimebaseModuleCfg(uint32_t baseAddr,
                                     uint32_t pwmFuncClk,
                                     CSL_EpwmTimebaseCfg_t *pTbCfg)
{
    /* Configure Time base clock */
    CSL_epwmTbTimebaseClkCfg(baseAddr, pTbCfg->tbClk, pwmFuncClk);

    /* Configure PWM time base counter frequency and direction */
    CSL_epwmTbPwmFreqCfg(
        baseAddr,
        pTbCfg->tbClk,
        pTbCfg->pwmtbCounterFreqPrd,
        pTbCfg->tbCntrDirection,
        CSL_EPWM_SHADOW_REG_CTRL_ENABLE);

    if (TRUE == pTbCfg->enableSynchronization)
    {
        /* Enable Synchronization */
        CSL_epwmTbSyncEnable(
            baseAddr, pTbCfg->phsCountAfterSync, pTbCfg->cntDirAfterSync);
    }
    else
    {
        /* Disable Synchronization */
        CSL_epwmTbSyncDisable(baseAddr);
    }

    /* Configure Sync out signal */
    CSL_epwmTbSetSyncOutMode(baseAddr, pTbCfg->syncOutSrc);

    /* Configure the emulation behaviour */
    CSL_epwmTbSetEmulationMode(baseAddr, EPWM_TB_EMU_MODE_FREE_RUN);

    return;
}

/**
 * \brief   This API configures the Counter-Comparator Sub-module.
 *
 * \param   baseAddr    Base address of PWMSS instance used
 * \param   pCcCfg      Pointer to the Counter-Comparator Sub-module
 *                      configuration data structure
 */
static void EpwmAppCounterComparatorCfg(uint32_t baseAddr,
                                        CSL_EpwmCounterCmpCfg_t *pCcCfg)
{
    /* Counter Comparator A configuration */
    CSL_epwmCounterComparatorCfg(
        baseAddr,
        CSL_EPWM_CC_CMP_A,
        pCcCfg->cmpAValue,
        CSL_EPWM_SHADOW_REG_CTRL_ENABLE,
        CSL_EPWM_CC_CMP_LOAD_MODE_CNT_EQ_ZERO,
        TRUE);

    /* Counter Comparator B configuration */
    CSL_epwmCounterComparatorCfg(
        baseAddr,
        CSL_EPWM_CC_CMP_B,
        pCcCfg->cmpBValue,
        CSL_EPWM_SHADOW_REG_CTRL_ENABLE,
        CSL_EPWM_CC_CMP_LOAD_MODE_CNT_EQ_ZERO,
        TRUE);

    return;
}

static void padConfig_prcmEnable(void)
{
#if defined (SOC_TDA3XX) || defined (SOC_DRA78x)
    /* UART Pad configurations */
   
    /* PWM Pad configurations - GPMC_BEN0 -> EHRPWM1A */
    HW_WR_REG32(
        SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_GPMC_BEN0, 0x00000004);
#endif

    /* Enable PRCM for PWMSS1 */
    HW_WR_REG32(SOC_L4PER_CM_CORE_BASE + CM_L4PER2_PWMSS1_CLKCTRL, 0x2);
    while ((HW_RD_REG32(SOC_L4PER_CM_CORE_BASE +
                        CM_L4PER2_PWMSS1_CLKCTRL) & (0x00030000)) != 0x0) ;
    /* Time base clock for PWMSS1 module */
    HW_WR_FIELD32(
        SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE + CTRL_CORE_CONTROL_IO_2,
        CTRL_CORE_CONTROL_IO_2_PWMSS1_TBCLKEN,
        1);

    /* XBar configuration */
    CSL_xbarIrqConfigure(
        APP_EHRPWM_XBAR_CPU, APP_EHRPWM_XBAR_INST, APP_EHRPWM_XBAR_INTR_SOURCE);

    /* Enable periodic interrupts for PWM period */
//    Intc_Init();
    Intc_IntEnable(APP_EHRPWM_INT);

    /* Register ISR */
    Intc_IntRegister(APP_EHRPWM_INT, (IntrFuncPtr) AppPwmIntrISR, 0);
    Intc_IntPrioritySet(APP_EHRPWM_INT, 1, 0);
    Intc_SystemEnable(APP_EHRPWM_INT);

    return;
}