TDA2HG: GPIO Timing Issues When SoC is the Master

Hi Stanislav,

we have used in a project where 4 * GPIOs are used to select the chipselect the OV490s.
example code shown below. Here we are not using MCSPI to drive our chip select. instead GPIO is used independently as chip select

SoC (TDA2H) is the master.

//Enable the chip select
for( i =0; i < 4; i++){
GPIO_WRITE(CAM_PORT_BANK, pin+i, HIGH);
}

spi_write(data, lengtj).

//Disable the chip select
for( i =0; i < 4; i++){
GPIO_WRITE(CAM_PORT_BANK, pin+i, LOW);
}


I am wondering what is the timing issues you are talking about when SoC is the master. May be this sounds a stupid question to you, but will help us in our understanding