RTOS/TDA3XEVM: How to debug ethernet MDIO interface？I can not access the phy register.

I use external PHY,and my mode of phy is KSZ9031.I think the hardware is ok,because using another software on my board is OK.

Thank you very much for your support, but that link does not solve my problem。Because from the following waveform view,TA bit is 0x02,and is OK.

Maybe my English level is not very good, leading to unclear description of the problem, or what I was wrong with.Maybe I did not describe my use of the environment, and some of my test environment.The type of phy I use is KSZ9031,On the same board（SOC is tda2xx，phy isKSZ9031）,Run linux system, the network is OK.However, run the BIOS system, MDIO can not access.So I think the problem lies in the vision_sdk nsp network firmware initialization,Such as the clock initialization, register configuration and so on.

Thank you！

static void LOCAL_MDIO_FindingState(const MDIO_State *pMdio, PHY_Device *pPhy)
{
    uint32_t *phyState = &pPhy->phyState;
    uint32_t phyMask = pPhy->phyMask;
    uint32_t phyNum, i, j, phyAcks;

    phyNum = PHY_NOT_FOUND;

    if ((*phyState & PHY_TIM_MASK) != 0)
    {
        *phyState = (*phyState & ~PHY_TIM_MASK) | ((*phyState & PHY_TIM_MASK) - ((uint32_t)1U << PHY_TIM_OFFSET));
    }
    else
    {
        phyAcks = myMDIO_ALIVE;MDIO_ALIVE register always is 0
        phyAcks &= phyMask; /* Only interested in 'our' phys */

        j = 1U;
        for (i = 0; i < (uint32_t)32U; i++)
        {
            if ((j & phyAcks) != 0)
            {
                break;
            }
            j = j << 1U;
}

My SOC model is TDA2X, MDIO configuration is as follows:

vin2a_d10 - MCLK
vin2a_d11 - MDIO

so my pinmux maybe is ok.Is there any other reason that will cause this problem? Can provide a debugging method? I do not know how to start.

Hello,

Can you please provide below details?

1. Which PHY are you using?

2. Is this TI EVM or custom board?

3. Your software configuration? like PHY mode, pin mux setting and Board mux if any?

As myMDIO_ALIVE is also zero i think issue is mostly due to wrong pinmux or boardmux missing. 

Hi Prasad,

I will try to summarize feedback from user:

"I use external PHY,and my mode of phy is KSZ9031. I think the hardware is ok, because using another software on my board is OK."

"On the same board（SOC is tda2xx, phy is KSZ9031 I run linux system, the network is OK. However, run the BIOS system, MDIO can not access. So I think the problem lies in the vision_sdk nsp network firmware initialization, such as the clock initialization, register configuration and so on."

"My SOC model is TDA2X, MDIO configuration is as follows:

vin2a_d10 - MCLK
vin2a_d11 - MDIO"

"MDIO pinmux MCLK pin is 0x30003(output), MDIO is 0x70003(input)"

"Phy address 0 is responsive (as seen from the screenshot), but MDIO_ALIVE register is always 0，How can I debug it？"

Hello Stan,

Apart from enabling GMAC module and setting clocks the MDIO doesn't need any other configuration from NSP.

In fact if you enable GMAC through gel files and enable MDIO module through CCS memory browser, you should be able to see PHY_ALIVE and Link_status getting set. So i strongly believe issue is due to, as said earlier, wrong pinmux or missing boardmux.

Also drom the MDIO register values shared earlier, i see MDIO clock divider set to 0x198, why is it so? Normally we set it to 0x1F or 0x89.

Is it possible for you to share schematics on my personal mail for review?

Thank you very much for your support!
I want to confirm, the following two pins need to configure IODELAY parameters:
vin2a_d10
vin2a_d11

From ti_components / drivers / pdk_01_07_00_16 / packages / ti / boot / sbl_auto / sbl_utils / src / tda2xx / sbl_utils_tda2xx_iodelay.c view is not configured, the software is OK on the EVM board, running on our board, I did not Change the IODELAY parameter

But in actual operation, I read the following two registers have a value:
CFG_VIN2A_D11_OEN RW 0x00000106
CFG_VIN2A_D11_OUT RW 0x000000c8

I do not know how these values are written in?