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TDA2: Power management: LPM(standby) and wakeup support for TDA2XX

Part Number: TDA2

Hello:

  this document(http://www.ti.com.cn/cn/lit/an/sprac22/sprac22.pdf)  introduce the power manage for TDA2xx about the standby and wakeup.

my question is :

1. Can one of M4 core control the MPU(A15) step into standby mode and wakeup it? after wakeup, can A15(linux) recover and continue to run properly?

2. Can one of M4 core also control other IPU DSP step into standby mode? and wake up them sequencely ?

3. Is there  external PINs to control the whole TDA2xx SOC step into standby mode and wakeup?

Thanks!

  • Hi Andy,

    The MPU (A15) would need to exceute the WFI instruction to enter into the standby mode. Additionally any MPU_LPRM registers to be programmed depending on what power mode you would like to enter from the A15 should be programmed by the A15 itself as these registers are not programmable from IPU M4. The IPU could potentially only program the SoC level PRCM MPU registers.

    I would imagine a potential scheme to be IPU sends a message to the A15 to enter Standby. The A15 programs the SoC PRCM, LPRM and runs the WFI instruction to enter standby. (This may involve some other steps to make sure other tasks on the A15 are quiescent, if there is a peripheral interaction that the A15 talks to and likely to generate interrupts that too is kept quiescent). When the IPU wants to wake up the A15 it can send a message over mailbox. The interrupt of the Mailbox will then wakeup the A15 to restore and continue to run.

    Again for the DSP case, the DSP itself needs to run the IDLE instruction and write to the PWRCMD register in the C66x corepac. IPU could potentially program the SoC PRCM registers. A similar scheme as the A15 described above can be used. Note the lowest power state of the DSP is power domain off state. If you try to "wakeup" the DSP from this state, you would need to restart the C66x DSP. HW_AUTO (clock gated) state does not require a C66x restart. The code can continue from where it entered clock gate state.

    TDA2xx does not support gating the clocks of the Core power domain IPs. The external pin can be used to tie up to an interrupt which is routed to the desired core in order to wake up the device. For example, one of the GPIO lines can be used to take an input and the GPIO interrupt can then be routed to the A15/IPU . This interrupt can be used to wakeup the CPU core which then wakes up the rest of the device.

    Thanks and Regards,
    Piyali
  • Hi Piyali:
    Thanks .
    Just one more to confirm that if any cores wakeup, all context will restore and continue to run, no exception?
  • Hi Andy,

    If you are going to HW_AUTO clock gated state or Retention (in the case of A15), all the context is retained even after low power mode. No Exceptions from the hardware behavior.

    If you are going to PD_OFF state, then you would need to restart that particular CPU.

    Thanks and Regards,

    Piyali

  • Hi Piyali:
    Thanks very much.