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OMAP3 using EHCI and OHCI controllers at the same time.

Other Parts Discussed in Thread: OMAP3515

Hi All,

 

I am using OMAP3515 revision 3.1. I am running CE6. I am trying to use both the USB EHCI and OHCI controllers at the same time.  Port 1 is connected to a high speed ULPI transceiver and ports 2 and 3 are connected to 6-pin full speed serial transceivers. I have reworked the drivers provided in the BSP so that the shared registers (USBTLL and UHH_CONFIG) are configured once before either controller is started. I believe I have the configuration correct because if I enable either the EHCI or the OHCI controller, it works as expected, however, if both controllers are enabled, it always fails. How it fails seems to depend on timing. Most failures appear to be one or both the host controller are failing to access memory (L3 master interface). So I have a few questions:

- Is anyone trying to use both controllers are the same time?

- Which host controller should be started first?

- How should the port ownership register/bits be initialized on startup of the EHCI controller?

- Any un-documented registers are bits required to make this work (I already know about P2_ULPI_BYPASS and P3_ULPI_BYPASS)?

- Any other suggestions on getting this working?

Thanks

DP

 

 

  • I am afraid there is a silicon bug that prevents EHCI and OHCI from being simultaneously used on the OMAP3. (It doesn't seem to be present in the current errata document, but it should be updated soon).

    You might want to use a high-speed ULPI transceiver plus a hub-controller with a built-in transaction translator. This will allow you to connect High-/Full- and Low-speed devices.

     

    - Anand

     

  • Hi,

    Thank you for the quick response. I am using the OMAP3515. Are you referening to "3.1.3 High-Speed USB Host Subsystem: Some Limitations Exist When Connecting to External Devices" in the latest errata document which can be found here http://focus.ti.com/lit/er/sprz278d/sprz278d.pdf? Or is there some other errata? If it is another one, can you please provide details?

    Cheers

    DP

  • Hi Danny,

    Anand is referring to section 3.1.3 of the Errata. "3.1.3 High-Speed USB Host Subsystem: Some Limitations Exist When Connecting to External Devices".

    The issues in section 3.1.3 are listed under ES3.0 silicon, but they also apply to ES3.1 silicon. So all the issues in section 3.1.3 still exist and have not been fixed yet. Once the Errata has been corrected, a link will be posted on this thread.

    Regards,

    Jeff Lance

  • Danny,

    You can refer to the errata document at http://focus.ti.com/lit/er/sprz278e/sprz278e.pdf (page 132)

    ----------------

    Advisory 3.1.1.183 HS USB: ECHI and OHCI Controllers Cannot Work Concurrently

    Revision(s) Affected: 3.1 and earlier
    Details: An issue in the USBHOST memory access arbiter prevents EHCI and OHCI Host
    Controllers from working simultaneously. As a result one cannot connect a HS and a FS
    USB devices on the USBHOST.
    Workaround(s): No workaround exists for the generic use-case. For low-throughput requirement a SW
    arbitration scheme can be implemented.

    ---------------

    Regards,
    Ajay