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TI Home » TI E2E Community » Support Forums » ARM® Processors » Sitara™ ARM® » AM3x Sitara ARM Processors Forum » AM3359 USB problems (R563 and R564 Required?)
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AM3359 USB problems (R563 and R564 Required?)

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lliamsonchael
Posted by lliamsonchael
on Mar 02 2012 07:19 AM
Expert1525 points

Hi,

We are trying to bring up a custom AM3359 board (15x15 ZCZ package) and are struggling with the USB ports.  We've pretty much cloned the EVM design (USB0 as a OTG port, USB1 as a HOST only port), but cannot get either port to come up using PSP 4.06.00.02 and the wiki configuration instructions.  There are two hardware differences we have noted:  

1) There are 2 resistors at 1.2K going into the USB[01]_VBUS input puts (on the EVM, these are R563 and R564).  We do not have them in our design.  Are they required?

2) For the USB1 (HOST ONLY) port, we do not have the +5V VBUS controlled by the USB1_DRVVBUS pin, it's just on all the time (we measured and confirmed the voltage is there).

At the moment, we are focused on getting USB1 up.  The drivers seem to install properly (I can provide dmesg or other console information if that would help), but on insertion of a USB device, nothing happens.  A quick check on /proc/interrupts shows no interrupts fire, and the device is not detected.

Are there any debug registers we should check to ensure that the device drivers are properly installed, etc?  lsusb shows:

root@am335x-evm:~# lsusb
Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
One suspicious thing:
root@am335x-evm:~ # cat /sys/devices/platform/omap/ti81xx-usbss/musb-hdrc.1/vbus
Vbus off, timeout 1100
Best I can tell, USB1_VBUS is getting +5 volts.  Does this look right?
Thanks for any insight.
-Mike

AM3359 USB
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  • Ajay
    Posted by Ajay
    on Mar 02 2012 08:16 AM
    Genius9470 points

    Mike,

    I am not sure if you can ignore USB1_DRVVBUS as controller drives this when controller determines the port to be in host mode based on ID pin is grounded. I would request hardware team to review you configuration so please share the schematics as well.

    Additionally can you send the outpput of "cat /proc/driver/musb_hdrc.1". This will print the value of DevCTL also where D[3:4] would tell the vbus value sensed by controller and D[7] as if its host or device.

    Ajay

    If my reply answers your question then please click on the green button "Verify Answer"

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  • lliamsonchael
    Posted by lliamsonchael
    on Mar 02 2012 08:48 AM
    Expert1525 points

    Hi Ajay,

    The USB1_ID pin is grounded.   I can send schematics, but would prefer not to post them on the E2E forum.  Can you recommend an alternate email,etc?

    Here are the results for the cat (I ran both ports):

    oot@am335x-evm:/sys/devices/platform/omap/ti81xx-usbss/musb-hdrc.1# cat /proc/driver/musb_hdrc.1
    Status: MHDRC, Mode=Peripheral (Power=f0, DevCtl=98)
    OTG state: b_idle; active
    Options: pio, otg (peripheral+host), [eps=16]
    Peripheral address: 00
    Root port status: 00000100
    Gadget driver: g_ether

    ep0 (hw0): 1buf, csr 0000 maxp 0000
    (queue empty)
    root@am335x-evm:/sys/devices/platform/omap/ti81xx-usbss/musb-hdrc.1#
    root@am335x-evm:/sys/devices/platform/omap/ti81xx-usbss/musb-hdrc.1# cat /proc/driver/musb_hdrc.0
    Status: MHDRC, Mode=Host (Power=e0, DevCtl=19)
    OTG state: a_wait_vrise; active
    Options: pio, otg (peripheral+host), [eps=16]
    Peripheral address: 00
    Root port status: 00000100
    Gadget driver: dbgp

    Clearly, something is afoot. USB1 should be Host, USB0 should be peripheral. I'm hoping is something in the configuration. We have the USB0_ID pin floating and the USB1_ID grounded.

    Also, I click the "verify button by mistake when I meant to hit reply"...

    -Mike

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  • Ajay
    Posted by Ajay
    on Mar 02 2012 09:28 AM
    Verified Answer
    Verified by lliamsonchael
    Genius9470 points

    usb0.devctl is showing that controller is detecting usb0 port as peripheral mode D[7] =1 and Vbus is 5V as D[3:4] = '11'.

    I guess its dedicated Vbus which might be a issue here as standard way is A) Vbus is off as DRVVBUS is not driven. B) controller detects ID pin grounded and enters into host mode when session is started using devctl.D0=1. C) controller drivers the DRVVBUS and VBUS is switched on.

    Ajay

    If my reply answers your question then please click on the green button "Verify Answer"

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  • lliamsonchael
    Posted by lliamsonchael
    on Mar 02 2012 10:47 AM
    Expert1525 points

    Hi Ajay,

    That was it.  We added USB1_DRVVBUS to control the USB1_VBUS +5V line (instead of tying it to +5V all the time) and the port came right up in host mode and detected our mass storage device.  

    Thanks for the help.  It would be helpful to add some specific instructions about this in the Spec and/or the User's Guide, as we had hoped to use the USB1_DRVVBUS pin as a GPIO for a separate function.  We didn't think a HOST only port required dynamic VBUS control, and that only OTG configured ports needed this capability.

    -Mike

    www.mitydsp.com

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  • Cyril BEGUET
    Posted by Cyril BEGUET
    on May 22 2012 09:37 AM
    Intellectual460 points

    Hello,

     

    I’m also victim of this VBUS pin. I thought that in host only mode VBUS was not required and I have made a board without connecting this pin. Information in TRM about this point will be nice. I re-read the chapter about VBUS. It does clearly explain how DRVVBUS and VBUS lines work for a device, but it’s not so clear for host mode.

     

    In usb_ctrlx register (offset 620h and 628h), bit 19 disable VBUS detect. What does this bit do?

    Is there really no way to activate USB in host mode without VBUS? I have to modify prototypes to make them working and it’s not easy to connect a wire directly on a BGA ball :-( .

     

    Thanks

     

    Cyril

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  • -DK-
    Posted by -DK-
    on May 22 2012 09:50 AM
    Expert6740 points

    Cyril,

    VBUS is required for both Peripheral and Host mode.

    I'll look into the functionality of the OTGVDET_EN bit.

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  • Daniel Eriksson
    Posted by Daniel Eriksson
    on Jun 20 2012 01:34 AM
    Prodigy100 points

    Hi. We are also having trouble with USB. The main problem is described here in this post. We can't get a signal on the DRVVBUS. Both our ID-pins are grounded since we want to use both ports as hosts.

    I happened to notice that the output from /proc/drivers/musb_hdrc.x is different compared with the output posted earlier in this thread. Does anyone have any idea what might be wrong? It seems that our ports are inactive. is that correct? There where no devices connected when I printed this out.

    cat /proc/driver/musb_hdrc.0
    Status: MHDRC, Mode=Host (Power=e0, DevCtl=80)
    OTG state: a_idle; inactive
    Options: ?dma?, otg (peripheral+host), [eps=16]
    Peripheral address: 00
    Root port status: 00000100
    CPPI: txcr=0 txsrc=0 txena=0; rxcr=0 rxsrc=280de80 rxena=0

    cat /proc/driver/musb_hdrc.1
    Status: MHDRC, Mode=Host (Power=e0, DevCtl=80)
    OTG state: a_idle; inactive
    Options: ?dma?, otg (peripheral+host), [eps=16]
    Peripheral address: 00
    Root port status: 00000100
    CPPI: txcr=0 txsrc=0 txena=0; rxcr=0 rxsrc=280de80 rxena=0

    Regards

    // Daniel

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  • Chandrashekhar V1
    Posted by Chandrashekhar V1
    on Jun 27 2012 03:07 AM
    Prodigy30 points

    Hi Ajay,

    We designed Am3359 based board with USB in self power configuration.(USB1_ID ignored from software and no power over USB1_VBUS)

    In my board I don't have any 5Volt regulator. DP, DM, GND coming to the USB-A type connector which is going to the external self powered 8-Port hub.

    I read the TRM and found that there is a bit in USB_CTRL1 register to disable the VBUS sense. Which is not working(Writing zero not disabling the Vbus sense ) for me and we are getting the message of over current sensed by the processor.

    Is it really required to sense the power over VBUS line in self-powered hub applications. Please let me know is there any software workaround. Otherwise please explain what is the USB_CTRL1 register Bit 19 do.

    Thanks and regards,

    Chandrashekhar.V

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  • peaves
    Posted by peaves
    on Jun 28 2012 01:51 AM
    Genius12765 points

    The USB PHY has four comparators connected to the VBUS input to provide the USB OTG controller status of VBUS.  Bit 19 of the USB_CTRL1 register disables three of the four comparators.  One of the comparators that can be disabled by this bit sources the UTMI defined VBUSVALID signal that is sourced by the PHY and is connected to the USB OTG controller to indicate VBUS is in the valid range (greater than 4.4 volts).  If you disable the comparator by setting this bit to 0b the USB OTG controller will not get a valid VBUS indication from the VBUSVALID signal.  This causes the USB OTG controller operating in host mode to think there is an over-current condition because it monitors the state of the VBUSVALID signal to determine if the voltage is greater than 4.4 volts and assumes the current limited VBUS source is in an over-current state if the PHY does not drive the VBUSVALID signal high.

    This ability to disable the comparators was added as a potential power saving feature.  This feature does not perform the task you expected.

    The USB OTG controller expects the VBUS source to be off when a host session is started.  If VBUS is applied before the host session is started, the USB OTG controller assumes it is already connected to another host and will enter device mode.  This is done to prevent two sources from driving VBUS at the same time.  If VBUS is not applied when a host session is started, the USB OTG controller will enter host mode and drive the respective DRVVBUS signal high which should be used to enable a current limited 5 volt VBUS source.  If you have a 5 volt power source in your product, a device similar to the TI TPS2051 can be used to control VBUS.  If you do not have a 5 volt power source in your product, a charge pump is needed to create VBUS.

    Regards,
    Paul 

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