I've found that when I enable the cache and MMU on my beaglebone, the printfs really slow down when writing to the CCS5 console (by a couple of magnitudes).
After a bit of investigation, I found that if I simply disable cache (C bit in SCTLR) before the C$$IO$$ breakpoint in writemsg and then enable it afterwards, the problem goes away... I tried all the obvious things like making _CIOBUF_ and writemsg uncacheable, and even putting both in sram, but none of that works.
It seems to me that disabling/enabling the cache around the breakpoint target is a bit dodgy, any ideas?
writemsg in trgmsg.c from rtsv7A8_A_le_eabi.lib...
cache = ___disableCache();
__asm(" .global C$$IO$$");
This problem is maybe fixed by CCS 5.2.1.00018.
Why don't you try it.
Yes, it now works! Thanks :)
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