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TI Home » TI E2E Community » Support Forums » ARM® Processors » Sitara™ ARM® » AM3x Sitara ARM Processors Forum » Am335x GPMC Multiplexed Address
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Am335x GPMC Multiplexed Address

Am335x GPMC Multiplexed Address

This question is not answered
Fred DiNicola
Posted by Fred DiNicola
on Jun 15 2012 08:30 AM
Prodigy10 points

Table 7-5 of the TRM shows GPMC_A[17] connected to A16 of a 16-bit device, GPMC_AD[15] is also shown as connected to A16.

Table 7-52 shows GPMC_A[16] connected to A16 of a 16-bit device.

Which one is correct?

Has anybody implemented a 16-bit NOR FLASH using the multiplexed GPMC_AD[0..15]?

Thanks

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  • BrandonAzbell
    Posted by BrandonAzbell
    on Jun 15 2012 12:39 PM
    Guru54790 points

    First, I must say that I am confused with what you are asking.  The title of the post and the last question are consistent, but everything else has me confused.

    I believe you are asking for how to connect a 16-bit NOR flash, which has separate address, data and control signals, to the AM335x GPMC when the GPMC is operating in a 16-bt multiplexed mode, correct?

     

    For you other items, I have comments below.

    Fred DiNicola

    Table 7-5 of the TRM shows GPMC_A[17] connected to A16 of a 16-bit device, GPMC_AD[15] is also shown as connected to A16.

    Table 7-5 of the TRM shows GPMC_A[17] connect to A16 of a 16-bit device in the "Non-multiplexed Address Data 16-bit device".  This is not consistent with your subject or final question.  If you are intended to connect in multiplexed mode, this column should be disregarded.

     

    Fred DiNicola

    Table 7-52 shows GPMC_A[16] connected to A16 of a 16-bit device.

    Table 7-52 does not even talk about signal connections of the address.  Rather it talks about a NAND interface.  Please clarify what you are referencing.

     

    Fred DiNicola

    Has anybody implemented a 16-bit NOR FLASH using the multiplexed GPMC_AD[0..15]?

     
    Table 7-5, the middle column (or 4th column) entitled "Multiplexed Address Data 16-bit Device" should be the configuration you look at.
     

    Brandon

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  • JayWhy
    Posted by JayWhy
    on Oct 23 2012 11:05 AM
    Intellectual330 points

    The TRM / Datasheet for the AM3359 has a bit of a conflict. If you want to connect to a Multiplexed Address/Data 16-bit device, you'll need to use the GPMC signals GPMC[11:1].

    The IO configuration for these signals say that a mux value of 0 will make them behave as GPMC_A[11:1]. A mux value of 4 will force them to GPMC_A[27:17]. 

    To use the GPMC peripheral for a AD Mux device, the IO mux for GPMC_A[11:1] must be set as value 0. 

    I have verified these settings on real hardware. 

    AM335x gpmc am3359 AM335 flash nor
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  • BrandonAzbell
    Posted by BrandonAzbell
    on Oct 25 2012 13:50 PM
    Guru54790 points

    JayWhy

    To use the GPMC peripheral for a AD Mux device, the IO mux for GPMC_A[11:1] must be set as value 0. 

    I have verified these settings on real hardware. 

    I would agree with your findings.  Obviously, you have verified this in hardware and that would be my interpretation of which GPMC address signals are to be used.

     

    JayWhy

    The TRM / Datasheet for the AM3359 has a bit of a conflict. If you want to connect to a Multiplexed Address/Data 16-bit device, you'll need to use the GPMC signals GPMC[11:1].

    The IO configuration for these signals say that a mux value of 0 will make them behave as GPMC_A[11:1]. A mux value of 4 will force them to GPMC_A[27:17].

    I'm not sure where the conflict or confusion is located.  The GPMC peripheral has the ability to operate in several modes.  For the multiplexed address/data mode, the functional signals of the GPMC interface, specifically gpmc_a and gpmc_d, have specific meaning.  These signals are then propagated from the GPMC peripheral to the I/Os pins of the device through a bank of IO muxes.  The datasheet Table 2-7 is describing the IO mux value configuration, and has nothing to do with the mode of operation of the GPMC peripheral, which in the scenario happens to be in the multiplexed address/data mode.

    Brandon

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  • JayWhy
    Posted by JayWhy
    on Oct 25 2012 17:20 PM
    Intellectual330 points

    The problem is that the signals gpmc_a[11:0] have two possible functions linked to the GPMC peripheral:

    mux value 0: gpmc_a[11:0]

    mux value 4: gpmc_a[27:a16]

    The TRM Table 7-5, center column, says I want to use pins gpmc_a[11:1] as a27:a17 for a 16-bit multiplexed device. Using that table, i set the mux settings to 4. Because the names of the signals at mux value 4 match the names given in Table 7-5. 

    HOWEVER, that is not how the system should be configured. THAT is the confusing part. 

    The TRM does NOT contain information on the correct IOMUX setting that should be used. 

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