I am planning a design that will boot from a 16-bit Multiplexed NOR flash. Table 26-9 of the TRM says that pins GPMC_A[11-0] are used during setup. In my design I intend to use these pins as mux function number 4, which uses the signals as the high A27-17 pins.
The section indicates that the A27-16 lines should be held low on the flash device. If I use the above setup below, do I still need to isolate the high address bits?
If the Boot ROM code is in multiplexed mode, will it actually drive GPMC_A[11-0] pins?
Thank you in advance.
Did you get an answer on this offline or figure it out yourself? We are facing the exact same scenario and am interested in your findings.
Thanks in advance.
I never received an answer. I had a hardware design issue with my design, so I have not been able to verify if the issue exists or not.
Could you give me some comments on my nor issue as below ?Thanks!
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