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Documentation errors in am335xPruReferenceGuide.pdf

While studying the IEP chapter in order to implement the IEP timer I noticed some errors:

Chapter 10:

table 188 (GLOBAL_CFG Register): the description of bits 19-8 and bit 0 seems to be swapped

table 192 (CMP_CFG Register):  the description of bits 8-1 and bit 0 seems to be swapped

As the contents of the corresponding figures match with the bit and field descriptions in the table, only the descriptions seems wrong.

Document Literature Number: SPRUHF8  May 2012

  • Literature Number: SPRUHF8A May 2012 – Revised June 2013

     

    Page 262, Table 195 CMP_CFG Register Field Descriptions

     

    for bits 8 -1: 

     

    "Compare registers enable, where CMP_EN[n] maps to CMP[n]"

    should be:                                          " CMP_EN[n] maps to CMP[n-1]"