• State
  • Locked Locked
  • Replies 7 replies
  • Subscribers 103 subscribers
  • Views 1882 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM335x ADC steps

Marlon Jose Masbad
Intellectual 740 points

Hi, there,

According to AM335x TRM chapter 12, there are 16 programmable step configuration registers which are used by the sequencer to control which channel to sample, etc.  I don't really understand "steps" here means since looking at fig 12-3, "step" here seems to be channel. However, ADC only has 8 channels.  Anyone can help to explain?

Thanks

shen wei

  • 0
    TI__Guru**** 393215 points
    Hi,
     
    Steps are described in detail in the beginning of section 12.4. A step is not a channel, it's a general term for sampling a channel input.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 740 points

    Hi Biser,

    Could you point out where the 16 steps listed? In section 12.1.1? According to Fig 12-3, seems each step will do 13 clock cycle ADC conversion which is confusing me. And when I specify ADC channel open delay and sample delay, does these two delays apply to all of 16 steps if they are enabled?

    Thanks

  • 0 in reply to Marlon Jose Masbad
    TI__Guru**** 393215 points
    You should regard each of the steps as a separate ADC configuration. The ADC FSC (state machine) then goes through the enabled steps one by one. Please read section 12.4 carefully.
  • 0 in reply to Biser Gatchev-XID
    Prodigy 10 points

    It is still not clear what means  ADC 16 programmable spets... 

    Could you describe what performs step#1,step#2 ... step#16 ?

    Thanks 

  • 0 in reply to Evgeny Raskin1
    TI__Intellectual 1980 points

    Evgeny,

    A step is just a single instantaneous configuration for the ADC. If you look at the TSC_ADC_SS register section you'll notice that each step has its own configuration register and delay register. You can configure these steps to perform various ADC measurements without having to reconfigure the ADC every time you want to take a measurement; the hardware will do all that work for you once you've configured the steps you want to use. You can simply program a few steps then enable/disable them using the STEPENABLE register to turn them on or off to perform measurements as necessary. 

    Each step, 1-16, is individually configurable to select any available references, channel inputs, sampling modes, etc. There is no particular channel or reference associated with a step number and you don't have to use the steps in any particular order. The user is free to select whichever step they would like to use and configure it to sample and channel they chose.

    Let me know if you have more questions.

    -Tyler

  • 0 in reply to Tyler Berryhill
    Intellectual 750 points

    Tyler,

    what is mean by open delay and sample delay,

    how to set bits ,how to set adc clock  ??

    Thanks & Regards,

    Naven

  • 0 in reply to Naven
    TI__Guru 55265 points

    The FSM sequencer provides two programmable delays for each step. Open Delay is used to control when the acquisition begins after the step starts and Sample Delay is used to control the acquisition period. Delays for each of the 16 steps can be configured independently via the respective STEPDELAYx register. Open Delay defaults to a value of zero which causes the acquisition period to begin as soon as the step starts. The start of the acquisition period can be delayed one adc_clk clock period for each incremental value of Open Delay. Sample Delay defaults to a value of zero which causes the acquisition period to be equal to two adc_clk clock periods. The acquisition period can be extended one adc_clk clock for each incremental value of Sample Delay.

    The ADC_CLKDIV register is used to divide the master oscillator reference clock (CLK_M_OSC) to a valid operating frequency.

    The TI AM437x has two ADCs.  ADC0 is very similar to the Touchscreen controller in AM335x.  ADC1 is also similar, but touchscreen features were removed and magnet card reader features were added.  I updated the functional description of ADC1 in the AM437x TRM, so you may find it helpful in explaining some of the basic ADC functions.

    Regards,
    Paul