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Initializing Devices Where One Target is Held in Reset by Another

HECTOR GARCIA
Prodigy 130 points
Other Parts Discussed in Thread: AM3358, SYSBIOS

 

Hello,

I am working with the AM335x GP EVM and I would like to debug the Cortex-M3 processor.  After I connect to the master CPU (Cortex A8 in this case) I try to connect to the Cortex-M3 (M3_wakeupSS_0) but I keep getting the same error:

"Error connecting to the target:
(Error -1266 @ 0x0)
Device is held in reset. Take the device out of reset, and retry the operation.
(Emulation package 5.1.180.0) "

How do I release the device (Cortex-M3) from reset? 

After some research, I think I should modify the GEL file to take the device out of reset but how do I accomplish this?

Thank you!

v/r

Hector Garcia

  • 0
    TI__Guru**** 168422 points

    Hector,

    You are correct in expecting the GEL file to take the Cortex M3 core out of reset (that is a similar scenario for other devices), but for some reason the file provided to us does not have this function. Therefore I will move this thread to the Sitara device forum and see if they can provide additional insights on how to do this either programmatically or by modifying the existing GEL file.

    Regards,

    Rafael

  • 0 in reply to desouza
    Prodigy 130 points

     

    Rafael,

    Thanks for your reply!

    Also, I was reading the "Configuring CCS for Heterogeneous Debugging" app report and it mentions the use of a "heterogeneous driver patch" for CCS.  After an extensive search, I was not able to find anything related to this patch. 

    Are you aware of this patch or plugin for CCS that will allow the debugging of multiple cores?

    Thank you!

    v/r

    Hector Garcia

  • 0 in reply to HECTOR GARCIA
    TI__Guru**** 168422 points

    Hector,

    If you are referring to SPRA752, this is an ancient document not applicable to any CCS versions released in the past decade.

    CCSv5 natively has the ability to debug either homogeneous or heterogeneous cores and some relevant pages can be seen at the links below.

    http://processors.wiki.ti.com/index.php/Multi-Core_Debug_with_CCSv5

    I couldn't locate any recent material regarding heterogeneous debugging, as it is heavily dependent on the underlying technology (SYS Link, DSP/Link, Codec Engine, etc.) and the links are shown below:

    http://processors.wiki.ti.com/index.php/Debugging_the_DSP_side_of_a_DSPLink_application_on_OMAP_using_CCS

    http://processors.wiki.ti.com/index.php/Debugging_the_DSP_side_of_a_DSPLink_application_on_OMAP-L138_using_CCS

    http://processors.wiki.ti.com/index.php/Debugging_the_DSP_side_of_a_CE_application_using_CCS

    Regards,

    Rafael 

  • 0
    Guru 92251 points

    HECTOR GARCIA said:
    I am working with the AM335x GP EVM and I would like to debug the Cortex-M3 processor.  After I connect to the master CPU (Cortex A8 in this case) I try to connect to the Cortex-M3 (M3_wakeupSS_0) but I keep getting the same error

    I had the same error with a AM335x Starter Kit.

    The CCS 5.4 ccsv5\ccs_base\emulation\boards\sk_am3358\gel\AM3358_StarterKit.gel was modifed to the Cortex-M3 to be taken out of reset by adding the following declarations:

    #define CM_WKUP_RM_WKUP_RSTCTRL           (PRCM_BASE_ADDR + 0xD00)

    /* RM_WKUP_RSTCTRL */
    #define PRM_WKUP_RM_WKUP_RSTCTRL_WKUP_M3_LRST   (0x00000008u)

    //****************************************************
    // CM3 memory start address and length
    //****************************************************
    #define CM3_UMEM_START_ADDR         (0x44D00000)
    #define CM3_UMEM_LENGTH             (16*1024)

    #define CM3_DMEM_START_ADDR         (0x44D80000)
    #define CM3_DMEM_LENGTH             (8*1024)

    And the following functions:
    //##############################################################################
    //##############################################################################
    //                       M3_CONTROL Configuration Section
    //##############################################################################
    //##############################################################################

    menuitem "M3_CONTROL"

    hotmenu Release_CM3_From_Reset()
    {
      // Set CM3 initial stack pointer to end of data memory
      WR_MEM_32 (CM3_UMEM_START_ADDR, CM3_DMEM_START_ADDR + CM3_DMEM_LENGTH);
     
      // Set the CM3 initial PC to point to an instruction that jumps to itself.
      // Upon release of the CM3 reset this holds the CM3 in a loop rather than
      // running undefined code, prior to CCS downloading a program to the CM3.
      WR_MEM_32 (CM3_UMEM_START_ADDR + 0x400, 0xE7FEE7FE);
      WR_MEM_32 (CM3_UMEM_START_ADDR + 4, 0x401);

      // Modify the Cortex-A8 register to release the Cortex-M3 from reset
      WR_MEM_32(CM_WKUP_RM_WKUP_RSTCTRL, RD_MEM_32(CM_WKUP_RM_WKUP_RSTCTRL) & ~PRM_WKUP_RM_WKUP_RSTCTRL_WKUP_M3_LRST);
    }

    hotmenu Hold_CM3_In_Reset()
    {
      // Modify the Cortex-A8 register to hold the Cortex-M3 in reset
      WR_MEM_32(CM_WKUP_RM_WKUP_RSTCTRL, RD_MEM_32(CM_WKUP_RM_WKUP_RSTCTRL) | PRM_WKUP_RM_WKUP_RSTCTRL_WKUP_M3_LRST);
    }

    To use:
    a) Connect to the CortexA8 in the CCS debug view
    b) Select Scripts -> M3_CONTROL -> Release_CM3_From_Reset
    c) In the CCS debug view you can now connect to the M3_wakeupSS_0, and then download a program to the Cortext-M3

    I haven't got a AM335x GP EVM to try, but looks like the same modifications could be made to the GEL scripts in ccsv5\ccs_base\emulation\boards\evmam3358\gel (there are different versions of the GEL scripts according to the harware revision of the AM335x GP EVM).

    Also, after having connected to the M3_wakeupSS_0 the CCS Register view is only showing the Core Registers. i.e. the Cortex-M3 peripheral registers are not shown. Haven't (yet) determined how to get the CCS debugger to show all Cortex-M3 peripheral registers.

  • 0 in reply to Chester Gillon
    Prodigy 130 points

    Hi Chester,

    Thank you for answering my previous post!

    Now, is there a particular location within the GEL file to insert the code you provided?  I modified my GEL file (AM335x_15x15_EVM_v1_5, in my case) by adding the declarations you provided but I am getting the "No source available for "0x2008c" " error message.  Also, when I try to load a program into the A8 I get the following errors:

        *******************************************************************************

         CortxA8: Breakpoint Manager: Retrying with a AET breakpoint

         CortxA8: Trouble Setting Breakpoint with the Action "Semi hosting" at 0x80006578: (Error -1066 @ 0x333C) Unable to set/clear requested breakpoint. Verify that  the breakpoint address is in valid memory. (Emulation package 5.1.207.0)

         CortxA8: Breakpoint Manager: Retrying with a AET breakpoint

         CortxA8: Trouble Setting Breakpoint with the Action "Finish Auto Run" at 0x80001e9c: (Error -1066 @ 0x333C) Unable to set/clear requested breakpoint. Verify that the breakpoint address is in valid memory. (Emulation package 5.1.207.0)

     *******************************************************************************

    I think that I shifted the register offset values and now the compiler is having trouble locating the original code.

    Any comments on this new issue?

    Thank you!

    v/r

    Hector Garcia

  • 0 in reply to Chester Gillon
    Prodigy 130 points

    Chester,

    Thanks for the code provided, the Cortex-M3 was released from reset!

    Now, I tried to create a simple "hello, world" program and downloaded it to the Cortex-M3 but I get the following error:

    "File: \...\....\....\program.out

    Does not match the target endianess, not loaded.  Check project build options and target configuration file (ccxml)."

    Do I need to create a separate .ccxml file for the Cortex-M3?

    I will appreciate your input, thnak you!

    v/r

    Hector Garcia

  • 0 in reply to HECTOR GARCIA
    Guru 92251 points

    HECTOR GARCIA said:
    Do I need to create a separate .ccxml file for the Cortex-M3?

    No, I was able to use one .ccxml file for the AM3358 in which:

    a) Connected to the Cortex-A8 to release the Cortex-M3 from reset.

    b) Then connect to the Cortex-M3 and download and run a "hello world" program.

    HECTOR GARCIA said:
    Does not match the target endianess, not loaded.  Check project build options and target configuration file (ccxml)."
    The Cortex-M3 is little endian. In the CCS project for the Cortex-M3, under project properties -> General -> Advanced Settings is Device endianness set to "little"?

  • 0 in reply to Chester Gillon
    Prodigy 130 points

    Yes,

    I figured that out a couple of minutes after posting the question!

    Do you have any links as to where can I find more information about the M3 (besides the TRM)?

    Thanks a lot for you help Chester!

    v/r

    Hector garcia

  • 0 in reply to HECTOR GARCIA
    Guru 92251 points

    HECTOR GARCIA said:
    Do you have any links as to where can I find more information about the M3 (besides the TRM)?

    See Cortex-M3 processors on the ARM website.

    As noted in Cortex-M3 memory map details missing from AM335x TRM the TRM doesn't seem to explicitly list the memory map as seen from the the Cortex-M3. However, https://github.com/jadonk/am33x-cm3 is the TI firmware for the Cortex-M3 which provides an example of what can be done, and definitions for the Cortex-M3 memory map and peripherals.

  • 0 in reply to Chester Gillon
    Prodigy 80 points

    I've struggled the whole day for the same problem. Could you further explain the step a)? I mean how to connect to CortexA8 in the CCS debug view?

    I've tried to bypass M3_wakeupSS_0 and do the steps you listed. But the following errors will be displayed:

    Release_CM3_From_Reset() cannot be evaluated.
    Could not write 0x44D00000: Execution state prevented access
    at *((unsigned int *) 0x44D00000)=(unsigned int) (0x44D80000+(8*1024)) [TMDXICE3359_v2_1A_new.gel:281]
    at Release_CM3_From_Reset()

    Any suggestions? Thanks in advance.

  • 0 in reply to Su Sheng1
    Prodigy 80 points

    I forgot to mention that the board I use is ICE v2, CCS version is 5.5, sdk version is am335x_sysbios_ind_sdk_1.1.0.4. The gel file modified is TMDXICE3359_v2_1A.gel, which is in the folder C:\ti\am335x_sysbios_ind_sdk_1.1.0.4\sdk\tools\gel\ICE.