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Am335x ADC Hardware Synchronization Issue

We are trying to use the ADC with HW step enable feature instead of SW step enable.  For HW step enable, we are trying to use GP timer-4 as source of event to start the ADC scanning either in single shot or continuous mode. We could able to start the synchronization with SW enabled single-shot/continuous mode. But we couldn’t able to start the Scan/Synchronization using Timer HW event. Following are the steps we are doing.

 1)  Mode bits in STEPCONFIG registers are set to  HW synchronized- one shot (tried with continuous as well)

2)   HW_event_mapping bit in CTRL register is set to “1” for Maching HW event to HW event input

3)  HW_Preempt bit in CTRL register is set to “1” for pre-empting the SW steps by HW event.

4)  ext_hw_event signal is configured to TIMER-4 by writing the 0x001 to ADC_EVT_CAPT register.

5)  We configured the timer-4 such that the initial level is LOW and then transitioned to HIGH.

 With the above configuration, we expected ADC module start scanning for all the channels when timer-4 pin is transitioned from LOW to HIGH. But the observation is that scanning is not happening and we are not getting END_OF_SEQUENCE interrupt. 

If any of them have any idea on this problem, please help me.

Regards

Madan