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AM335x Spurious Interrupt Handling

Hi All,

       I'm confused by the ARM A8 INTC Spurious Interrupt Handling in the section 6.2.5 of technology reference manual. Any one can help me to understand it? Thanks in advance. My questions are:

     - How can we change the values in the INTC_MIRn, INTC_ILRm, or INTC_MIR_SETn registers within the 10-cycle window after the interrupt assertion? Change the values at the very beginning of IRQ handler? Change the values in the beginning of a critical section? E.g. 

       int main(void) {

         ...

         while (1)  {

             CPUirqd(); // disable IRQ

             change values of INTC_MIRn, INTC_ILRm, or INTC_MIR_SETn;

              CPUirqe();// enable IRQ

         }

         ...

        }

       I just want to know in what kinds of conditions the spurious interrupt can occur.

      - Is the spurious interrupt avoidable in the software? How to? I didn't find any example in the AM335X_StarterWare handle the spurious interrupt. Does it mean we don't need to care about it?

     - If the SPURIOUSIRQFLAG is set what can we do? Base on my current understanding I think if we detect the SPURIOUSIRQFLAG is invalid status in the beginning of IRQ handler then do a resort by set NewIRQAgr  and proceed with new INTC_SIR_IRQ value. 

  • The docs are indeed a bit vague about spurious IRQs, but they are easy to deal with in practice.

    Ricky Huang1 said:
    Is the spurious interrupt avoidable in the software?

    Usually not easily, but this is not really a problem.

    Ricky Huang1 said:
    If the SPURIOUSIRQFLAG is set what can we do? Base on my current understanding I think if we detect the SPURIOUSIRQFLAG is invalid status in the beginning of IRQ handler then do a resort by set NewIRQAgr  and proceed with new INTC_SIR_IRQ value. 

    If you detect SPURIOUSIRQFLAG (i.e. INTC_SIR_IRQ is negative), trigger NewIRQAgr and simply return from the IRQ handler.  If another IRQ is pending, the IRQ handler will automatically be reentered, but there may not be one.