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AM335x NAND Configuration Register Settings

Ignacio Linares
Expert 1655 points

I have a customer asking the following:

Our board will have a 512MB NAND flash on CS0 and, optionally, 1 to 3 1GB NAND flash on CS1-CS3.  (The 1GB NAND, when multiple chips are used, will be concatenated to form a single large partition.) 

I’ve read that, when configured for NAND, the GPMC 256MB limit does not apply since the CPMC has a specific NAND address register.  My question is how should GPMC_CONFIG7 be configured for each chip select for our configuration?  Specifically, should a MASKADDRESS of 0h be used for all chip selects when configured for NAND or does it matter? 

I see in U-Boot that GPMC_CONFIG7_0, for the AM335x_EVM, is set to 0x00000048; the base address is 0x08000000:

MASKADDRESS = 0h = Chip select size of 256M

CSVALID = 1h = CS (active low) enabled

BASEADDRESS = 8h

It just happens that the AM335x_EVM is populated with a 256MB flash so I’m not sure if there is any significance to the MASKADDRESS value.

 

If MASKADDRESS = 0h (256MB) is used for all chip selects, would GPMC_CONFIG7 be:

GPMC_CONFIG7_0 = 0x00000048

GPMC_CONFIG7_1 = 0x00000058

GPMC_CONFIG7_2 = 0x00000068

GPMC_CONFIG7_3 = 0x00000078

or

if MASKADDRESS = Fh (16MB) is used:

GPMC_CONFIG7_0 = 0x00000F48

GPMC_CONFIG7_1 = 0x00000F49

GPMC_CONFIG7_2 = 0x00000F4A

GPMC_CONFIG7_3 = 0x00000F4B

 

  • 0
    TI__Guru**** 393215 points

    Hi Ignacio,

    This is described in sections 7.1.3.3.8.1 and 7.1.3.3.12.1.1 of the AM335X TRM Rev. K. 16MB (smallest) CS size is needed.

    For 16MB step GPMC_CONFIG7 values will be 0xF41, 0xF42, 0xF43, 0xF44

  • 0
    TI__Guru**** 393215 points

    Ignacio Linares said:
    The 1GB NAND, when multiple chips are used, will be concatenated to form a single large partition. 

    Forgot to add, I don't see how this can be achieved.

  • 0
    Genius 3685 points

    I do not understand why you are doing such a bad design:

    - using 4 NAND chips on a board uses much space (==cost),

    - The GPMC signals have to be connected to 4 chips, which will degrade signal quality.

    - 4 NAND chips will cost more money than 1.

    - You have to use some sort of logic volume managment to create a large virtual partition.

    IMHO, it's better to use only ONE Nand chip of variable size. If you choose TSOP-48, you will get NAND chips from 512MByte to 4GByte in the same package.  If you use ONFI NAND Flashes, the software will identify the different NAND chips without problems.