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timed out in wait_for_bb: I2C_STAT=1000

Bernie Chen
Expert 2190 points
Other Parts Discussed in Thread: AM3352

Hi TI

We use u-boot-2013.01.01-psp06.00.00.00 on custom board

We have revised to 8Gb nand flash and booted form nand flash success.  Now we change eeprom address to address 0x51

The same code in nand flash , but in u-boot mode to command

U-Boot# i2c dev 1

U-boot#  i2c probe

Valid chip addresses:timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000

But If we use the same code from sd card , it can

U-Boot # i2c probe

                 2D  51

Thank you very much..

           

  • 0
    TI__Guru**** 393215 points

    Hi,

    Do you see any activity on the I2C bus when this happens?

  • 0 in reply to Biser Gatchev-XID
    Expert 2190 points
    Hi Biser

    Could you direct me more? or example,thank you.
    And I attach sd card boot log and nand flash boot to compare

    sd
    ===============================================================
    U-Boot SPL 2013.01.01-g057f979-dirty (Mar 06 2015 - 18:28:33)
    musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
    musb-hdrc: MHDRC RTL version 2.0
    musb-hdrc: setup fifo_mode 4
    musb-hdrc: 28/31 max ep, 16384/16384 memory
    USB Peripheral mode controller at 47401000 using PIO, IRQ 0
    musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
    musb-hdrc: MHDRC RTL version 2.0
    musb-hdrc: setup fifo_mode 4
    musb-hdrc: 28/31 max ep, 16384/16384 memory
    USB Host mode controller at 47401800 using PIO, IRQ 0
    OMAP SD/MMC: 0
    reading u-boot.img
    reading u-boot.img


    U-Boot 2013.01.01-g057f979-dirty (Mar 06 2015 - 18:28:33)

    I2C: ready
    DRAM: 256 MiB
    WARNING: Caches not enabled
    NAND: [Bernie] NAND ID: Byte0: 2c, Byte1: 38
    [Bernie] NAND ID: 2c, 38, 0, 26, 85, 0, 0, 8f
    [Bernie] set oobsize 224
    [Bernie] writesize = 4096
    [Bernie] erasesize = 262144
    [Bernie] BUSWIDTH = 0
    1024 MiB
    MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
    *** Warning - bad CRC, using default environment

    musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
    musb-hdrc: MHDRC RTL version 2.0
    musb-hdrc: setup fifo_mode 4
    musb-hdrc: 28/31 max ep, 16384/16384 memory
    USB Peripheral mode controller at 47401000 using PIO, IRQ 0
    musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
    musb-hdrc: MHDRC RTL version 2.0
    musb-hdrc: setup fifo_mode 4
    musb-hdrc: 28/31 max ep, 16384/16384 memory
    USB Host mode controller at 47401800 using PIO, IRQ 0
    Net: <ethaddr> not set. Validating first E-fuse MAC
    cpsw, usb_ether
    Hit any key to stop autoboot: 0


    nand flash
    =============================================================
    U-Boot SPL 2013.01.01-g057f979-dirty (Mar 06 2015 - 18:28:33)
    timed out in wait_for_pin: I2C_STAT=1000
    I2C read: I/O error
    musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
    musb-hdrc: MHDRC RTL version 2.0
    musb-hdrc: setup fifo_mode 4
    musb-hdrc: 28/31 max ep, 16384/16384 memory
    USB Peripheral mode controller at 47401000 using PIO, IRQ 0
    musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
    musb-hdrc: MHDRC RTL version 2.0
    musb-hdrc: setup fifo_mode 4
    musb-hdrc: 28/31 max ep, 16384/16384 memory
    USB Host mode controller at 47401800 using PIO, IRQ 0


    U-Boot 2013.01.01-g057f979-dirty (Mar 06 2015 - 18:28:33)

    I2C: ready
    DRAM: 256 MiB
    WARNING: Caches not enabled
    NAND: [Bernie] NAND ID: Byte0: 2c, Byte1: 38
    [Bernie] NAND ID: 2c, 38, 0, 26, 85, 0, 0, 8f
    [Bernie] set oobsize 224
    [Bernie] writesize = 4096
    [Bernie] erasesize = 262144
    [Bernie] BUSWIDTH = 0
    1024 MiB
    MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
    *** Warning - bad CRC, using default environment

    musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
    musb-hdrc: MHDRC RTL version 2.0
    musb-hdrc: setup fifo_mode 4
    musb-hdrc: 28/31 max ep, 16384/16384 memory
    USB Peripheral mode controller at 47401000 using PIO, IRQ 0
    musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
    musb-hdrc: MHDRC RTL version 2.0
    musb-hdrc: setup fifo_mode 4
    musb-hdrc: 28/31 max ep, 16384/16384 memory
    USB Host mode controller at 47401800 using PIO, IRQ 0
    Net: <ethaddr> not set. Validating first E-fuse MAC
    cpsw, usb_ether
    Hit any key to stop autoboot: 0
  • 0 in reply to Bernie Chen
    TI__Guru**** 393215 points

    I meant have you probed the I2C lines with an oscilloscope to see if there is any activity when the error occurs?

  • 0 in reply to Biser Gatchev-XID
    Expert 2190 points
    Hi Biser

    Hahaha I find that i replace CPU, It work fine. I'm sorry to waste your time.

    Bernie
  • 0 in reply to Bernie Chen
    TI__Guru**** 393215 points

    No problem, glad to hear you solved your problem.

  • 0 in reply to Bernie Chen
    Expert 1010 points

    Hi Bernie

    I am also facing similar kind of problem "I2C:   Timed out in wait_for_bb: status=1000", Could you please guide me how to resolve this error.

    We have beagle bone black prototyped custom board where we have AM3352 processor and rest every thing same. U-Boot version is "U-Boot  2014.07 (Jun 29 2015 - 20:05:32)" and kernel 3.14 we are using. I did re-profiling and got the new values and same values updated in my u-boot source code under "arch/arm/include/asm/arch-am33xx/ddr_defs.h" file.

    Original Beagle bone black DDR timing values:

    /* Micron MT41K256M16HA-125E */

    #define MT41K256M16HA125E_EMIF_READ_LATENCY     0x100007

    #define MT41K256M16HA125E_EMIF_TIM1             0x0AAAD4DB

    #define MT41K256M16HA125E_EMIF_TIM2             0x266B7FDA

    #define MT41K256M16HA125E_EMIF_TIM3             0x501F867F

    #define MT41K256M16HA125E_EMIF_SDCFG            0x61C05332

    #define MT41K256M16HA125E_EMIF_SDREF            0xC30

    #define MT41K256M16HA125E_ZQ_CFG                0x50074BE4

    #define MT41K256M16HA125E_RATIO                 0x80

    #define MT41K256M16HA125E_INVERT_CLKOUT         0x0

    #define MT41K256M16HA125E_RD_DQS              0x38

    define MT41K256M16HA125E_WR_DQS                0x44

    #define MT41K256M16HA125E_PHY_WR_DATA         0x7D

    #define MT41K256M16HA125E_PHY_FIFO_WE           0x94

    #define MT41K256M16HA125E_IOCTRL_VALUE          0x18B

    Calculated DDR Timing Values:

    /* Micron MT41K256M16HA-125E */

    #define MT41K256M16HA125E_EMIF_READ_LATENCY     0x100007

    #define MT41K256M16HA125E_EMIF_TIM1             0x0AAAD4DB

    #define MT41K256M16HA125E_EMIF_TIM2             0x266B7FDA

    #define MT41K256M16HA125E_EMIF_TIM3             0x501F867F

    #define MT41K256M16HA125E_EMIF_SDCFG            0x61C05332

    #define MT41K256M16HA125E_EMIF_SDREF            0xC30

    #define MT41K256M16HA125E_ZQ_CFG                0x50074BE4

    #define MT41K256M16HA125E_RATIO                 0x80

    #define MT41K256M16HA125E_INVERT_CLKOUT         0x0

    #define MT41K256M16HA125E_RD_DQS                0x38

    #define MT41K256M16HA125E_WR_DQS                0x43

    #define MT41K256M16HA125E_PHY_WR_DATA           0x7B

    #define MT41K256M16HA125E_PHY_FIFO_WE         0x98

    #define MT41K256M16HA125E_IOCTRL_VALUE          0x18B

    When I load my u-boot and MLO image as per the latest changes and am seeing the below error messages

    I2C:   Timed out in wait_for_bb: status=1000
    Timed out in wait_for_bb: status=1000
    ready
    DRAM:  512 MiB
    MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
    Timed out in wait_for_bb: status=1000
    Timed out in wait_for_bb: status=1000
    Net:   <ethaddr> not set. Validating first E-fuse MAC

    could you please help me in resolving this issue and i am booting from eMMC.

    Thanks alot ,