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AM335x Newer Kernels (3.8 & 4.x) OPP MPU_PLL location?

Good day all!

I've been asking this question on multiple forums, but I have gotten no answers that actually answer my question.

Currently, I'm working on compiling a custom Kernel (Either 3.8 or 4.x). I have not ran into any problems but this one; basically I'm not finding the designation file that defines the values for the OPP's MPU_PLL tables specifically for the 33xx series.

For example in the 3.14 Kernel it's easily located in the opp33xx_data.c file.

https://github.com/beagleboard/linux/blob/3.14/arch/arm/mach-omap2/opp33xx_data.c

Which defines as:

};
static struct omap_opp_def am33xx_es2_x_opp_list[] __initdata = {
/* MPU OPP1 - OPP50 or OPP100 */
OPP_INITIALIZER("mpu", true, 300000000, 950000),
/* MPU OPP2 - OPP100 */
OPP_INITIALIZER("mpu", true, 600000000, 1100000),
/* MPU OPP3 - OPP120 */
OPP_INITIALIZER("mpu", true, 720000000, 1200000),
/* MPU OPP4 - OPPTurbo */
OPP_INITIALIZER("mpu", true, 800000000, 1260000),
/* MPU OPP5 - OPPNitro */
OPP_INITIALIZER("mpu", true, 1000000000, 1325000),
};

So that's pretty easy to understand, our 1Ghz operation is labeled under the OPPNitro / OPP5 designation. No problems.

Now, the issue, is that if you look under any other branch outside of the 3.14 Kernel, there is no file that has anything like the table above for the 33xx or 335x.

What I did find is designation for the 363x and 43xx microprocessors, in a similar format to the above. Yet again, nothing for the 33xx/335x.

Am I looking in the wrong place? Or am I missing something all together?

Any help is extremely appreciated, thank you very much.

-Sam.

  • Hi Sam,

    I am not sure about 3.8, but I have kernel 3.19 & kernel 4.0 cloned from mainline (kernel.org). The opp table you refer to is located in arch/arm/boot/dts/am33xx.dtsi:

    cpus {

          #address-cells = <1>;

          #size-cells = <0>;

          cpu@0 {

                   compatible = "arm,cortex-a8";

                   device_type = "cpu";

                   reg = <0>;

                  /*

                  * To consider voltage drop between PMIC and SoC,

                  * tolerance value is reduced to 2% from 4% and

                  * voltage value is increased as a precaution.

                  */

                  operating-points = <

                                       /* kHz    uV */

                                      720000  1285000

                                      600000  1225000

                                      500000  1125000

                                      275000  1125000

                    >;

                   voltage-tolerance = <2>; /* 2 percentage */

                   clocks = <&dpll_mpu_ck>;

                   clock-names = "cpu";

                   clock-latency = <300000>; /* From omap-cpufreq driver */

         };

    };

    Best Regards,

    Yordan