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Setting ECC bit Size and handling ECC errors on AM335x

Paul Joseph
Expert 2775 points

I have questions on how to set the BOM ROM to assume a ECC bit size (4 bit, 8 bit etc) and on how ROM code handles ECC errors?

 

  1. There is a strap for setting ECC to be done in ROM CODE and we do set this strap. But there does not seem to be  strap for the ECC correction bit size? How does the ROM code know the bit size of ECC used?

 

  1. Also, although ROM Code corrects ECC errors, on data read from Flash before loading into Memory, does the ROM code on detecting an error, write the corrected Block back to Flash? I suspect that this is not true. So what would most implementers do?

     

    1. Re-Read the Boot code (Code that Boot ROM reads from Flash) and re-detect any errors and write back corrections?

    2. Use a Flash which the first Block is guaranteed not to have errors and ensure that the Boot code resides in 1 block.?

  • 0
    TI__Guru**** 393215 points

    Hi Paul,

    Paul Joseph said:
    There is a strap for setting ECC to be done in ROM CODE and we do set this strap. But there does not seem to be  strap for the ECC correction bit size? How does the ROM code know the bit size of ECC used?

    ROM code selects the BCH algorithm according to the NAND page size / spare area size. Generally speaking for 2048 byte NAND page size BCH-8 is used. For 4096 byte NAND page size BCH-16 is used.

    Paul Joseph said:
    Also, although ROM Code corrects ECC errors, on data read from Flash before loading into Memory, does the ROM code on detecting an error, write the corrected Block back to Flash? I suspect that this is not true. So what would most implementers do?

    You are right, ROM code does not support this. Almost all NAND memories have a guaranteed number of error-free blocks. In addition to this 4 copies of the MLO (first-stage bootloader) are written to NAND.

  • 0 in reply to Biser Gatchev-XID
    Expert 2775 points

    When booting from ROM code / Hardware and assuming BCH-8, what is the “minimum distance” for the BCH-8 the algorithm? I believe this is a function of the code length or what we are calling the sub block length,

  • 0 in reply to Paul Joseph
    Genius 3685 points

    The ROM code reads the page, calculate the ECC of this page while reading, then reads the OOB area of this page with the ECC and compare/correct.

    The OOB area consists of 2 byte bad block marker and 4 x 14 ECC bytes (actual 13 bytes + 1 byte with value "0"). Each 14 ECC bytes is for a 512 bytes subpage.