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unable to access hardware registers in U-boot

Hi ,

we trying to add LCD support in U-boot, we like add all as new.

we are unable write anything into the registers: we are doing like this , please correct me if we are doing any thing wrong.

Yes this code is not complete  and need to change the procedure -- if single register works we like to change.

and we are calling this Lcd_init in board/ti/am335x/board.c  in board_late_init -- function.

driver/lcd/st7335r.c    //---- file path where we posted.

int Lcd_Init()
{

unsigned int clkDiv;

/* **Clock for DMA,LIDD and for Core(which encompasses
** Raster Active Matrix and Passive Matrix logic) * enabled. */
printf("%s \n",__func__);

//initialization code
HWREG(SOC_LCDC_0_REGS + LCDC_CLKC_ENABLE) = (LCDC_CLKC_ENABLE_CORE | LCDC_CLKC_ENABLE_DMA | LCDC_CLKC_ENABLE_LIDD);
printf("mycode start here \n");

/* Disable raster */

HWREG(SOC_LCDC_0_REGS + LCDC_RASTER_CTRL) &= ~LCDC_RASTER_CTRL_RASTER_EN;
printf("mycode start here \n");

/* Configure the pclk */

clkDiv = 192000000 / 23040000 ;
printf("mycode start here \n");

HWREG(SOC_LCDC_0_REGS + LCDC_LCD_CTRL) = LCDC_LCD_CTRL_MODESEL_LIDD;
HWREG(SOC_LCDC_0_REGS + LCDC_LCD_CTRL) |= (clkDiv << LCDC_LCD_CTRL_CLKDIV_SHIFT);

/* DMA enable in lidd mode */

HWREG(SOC_LCDC_0_REGS + LCDC_LIDD_CTRL) = (LCDC_LIDD_CTRL_LIDD_DMA_EN_ACTIVATE << LCDC_LIDD_CTRL_LIDD_DMA_EN_SHIFT);

/* Configuring DMA of LCD controller */
HWREG(SOC_LCDC_0_REGS + LCDC_LCDDMA_CTRL) = LCDC_LCDDMA_CTRL_FRAME_MODE | (4 <<LCDC_LCDDMA_CTRL_BURST_SIZE_SHIFT ) | (0 << LCDC_LCDDMA_CTRL_TH_FIFO_READY_SHIFT) | 0;

// Configuring the base ceiling
HWREG(SOC_LCDC_0_REGS + LCDC_LCDDMA_FB0_BASE) = (unsigned int)image1 ;
HWREG(SOC_LCDC_0_REGS + LCDC_LCDDMA_FB0_CEILING) = (unsigned int)image1 + sizeof(image1) - 2;

HWREG(SOC_LCDC_0_REGS + LCDC_LCDDMA_FB1_BASE) = (unsigned int)image1 ;
HWREG(SOC_LCDC_0_REGS + LCDC_LCDDMA_FB0_CEILING) = (unsigned int)image1 + sizeof(image1) - 2;

}

we got this error while running -- u-boot:

U-Boot 2013.10-00189-g78d8ebd-dirty (Aug 03 2015 - 13:46:03)

I2C:   ready
DRAM:  256 MiB
NAND:  256 MiB
MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
*** Warning - bad CRC, using default environment

Viswa this is my NAND Image
 Lcd_Init:before Setup lcd 
 mycode start here 
data abort

    MAYBE you should read doc/README.arm-unaligned-accesses

pc : [<8f76c1a0>]          lr : [<8f76c190>]
sp : 8f32dea8  ip : 00000000     fp : 80614bd0
r10: 80645dea  r9 : 8f32df38     r8 : 4030cdcc
r7 : 4030cb7c  r6 : 00000002     r5 : 8f793c85  r4 : 00000000
r3 : 4830e000  r2 : 00000000     r1 : 0000000a  r0 : 00000013
Flags: nZCv  IRQs off  FIQs on  Mode SVC_32
Resetting CPU ...

regards,

Viswanath K