This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

kernel panic , while doing erase and copy of mtd partition using flash_erase and flashcp.

We are using customised  AM335x-sk board with spi flash boot (kernel 3.14.26),

From the kernel prompt when we execute the following cmd, we are having the kernel panic.

       flashcp  /media/ramdisk/rootfs.jffs2  /dev/mtd7 

We have created ramdisk of size 64MB and mounted on /media/ramdisk/

The kenel panic is as follows:

[ 360.712784] INFO: task jffs2_gcd_mtd6:730 blocked for more than 120 seconds.

[ 360.720197] Tainted: G W 3.14.26-ge93caaa-dirty #25
[ 360.726802] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
[ 360.735034] jffs2_gcd_mtd6 D c03d29f4 0 730 2 0x00000000
[ 360.741782] [<c03d29f4>] (__schedule) from [<c03d2ee8>] (schedule_preempt_disabled+0xc/0x10)
[ 360.750677] [<c03d2ee8>] (schedule_preempt_disabled) from [<c03d3cd8>] (__mutex_lock_slowpath+0x70/0xb8)
[ 360.760669] [<c03d3cd8>] (__mutex_lock_slowpath) from [<c02dacd4>] (m25p80_erase+0x58/0x318)
[ 360.769577] [<c02dacd4>] (m25p80_erase) from [<c02cbce8>] (part_erase+0x30/0x7c)
[ 360.777377] [<c02cbce8>] (part_erase) from [<c02c8abc>] (mtd_erase+0x5c/0x88)
[ 360.784910] [<c02c8abc>] (mtd_erase) from [<c019a76c>] (jffs2_erase_pending_blocks+0x318/0x664)
[ 360.794075] [<c019a76c>] (jffs2_erase_pending_blocks) from [<c0198fd4>] (jffs2_garbage_collect_pass+0x1b0/0xba0)
[ 360.804778] [<c0198fd4>] (jffs2_garbage_collect_pass) from [<c019ab5c>] (jffs2_garbage_collect_thread+0xa4/0x174)
[ 360.815579] [<c019ab5c>] (jffs2_garbage_collect_thread) from [<c004cce0>] (kthread+0xbc/0xd8)
[ 360.824569] [<c004cce0>] (kthread) from [<c000eef8>] (ret_from_fork+0x14/0x3c)
[ 360.832143] Kernel panic - not syncing: hung_task: blocked tasks
[ 360.838448] CPU: 0 PID: 391 Comm: khungtaskd Tainted: G W 3.14.26-ge93caaa-dirty #25
[ 360.847503] [<c0013f50>] (unwind_backtrace) from [<c0011588>] (show_stack+0x10/0x14)
[ 360.855652] [<c0011588>] (show_stack) from [<c03cf058>] (panic+0x7c/0x1dc)
[ 360.862891] [<c03cf058>] (panic) from [<c007f444>] (watchdog+0x284/0x2b4)
[ 360.870026] [<c007f444>] (watchdog) from [<c004cce0>] (kthread+0xbc/0xd8)
[ 360.877154] [<c004cce0>] (kthread) from [<c000eef8>] (ret_from_fork+0x14/0x3c)

Any help or input's will be appreciated

Regards,

Shrikanth

  • Hi,

    I will forward this to the SW team.
  • Hi Shrikanth,

    I suspect that jffs2_gcd_mtd6, because your either spi communication fails, or the spi flash is not initialized properly.

    Can you check your bootlog (or dmesg) for such errors? Can you share the dts configuration of your board?

    Best Regards,
    Yordan
  • Hi Yordan,

    Thanks for the replay.    

    The  spi flash  initialization is fine because  kernel is booting properly.  After that we  are changing the partition permission and using flash erase  for erasing mtd partition and flashcp for  copying data(rootfs.jffs2) into it.  some time while doing flashcp we are facing this kernel panic.

    attaching the dts file.

    dts_file.txt
    /*
     * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
     *
     * This program is free software; you can redistribute it and/or modify
     * it under the terms of the GNU General Public License version 2 as
     * published by the Free Software Foundation.
     */
    
    /*
     * AM335x Starter Kit
     * http://www.ti.com/tool/tmdssk3358
     */
    
    /dts-v1/;
    
    #include "am33xx.dtsi"
    #include <dt-bindings/pwm/pwm.h>
    
    / {
    	model = "TI AM335x EVM-SK";
    	compatible = "ti,am335x-evmsk", "ti,am33xx";
    
    	cpus {
    		cpu@0 {
    			cpu0-supply = <&vdd1_reg>;
    		};
    	};
    
    	memory {
    		device_type = "memory";
    		reg = <0x80000000 0x10000000>; /* 256 MB */
    	};
    
    	vbat: fixedregulator@0 {
    		compatible = "regulator-fixed";
    		regulator-name = "vbat";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    		regulator-boot-on;
    	};
    
    	vtt_fixed: fixedregulator@3 {
    		compatible = "regulator-fixed";
    		regulator-name = "vtt";
    		regulator-min-microvolt = <1500000>;
    		regulator-max-microvolt = <1500000>;
    		gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
    		regulator-always-on;
    		regulator-boot-on;
    		enable-active-high;
    	};
    
    	p1c_gpio_export {
    		pinctrl-names = "default";
                    pinctrl-0 = <&p1c_gpio_signals>;
    		compatible = "gpio-export";
    
    		gpio@16 {
    			gpio-export,name = "p1c:usb_subtend_present";
    			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
    			default-state = "off";
    		};
    
    		gpio@17 {
    			gpio-export,name = "p1c:usb_subtend_12v_enable";
    			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
    			default-state = "off";
    		};
    
    		gpio@28 {
    			gpio-export,name = "p1c:usb_subtend_enable";
    			gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
                            default-state = "off";
    		};
     	};
    };
    
    &am33xx_pinmux {
    	pinctrl-names = "default";
    	pinctrl-0 = <&gpio_keys_s0 &clkout2_pin &ddr3_vtt_toggle &spi0_pins_s0 &p1c_gpio_signals>;
    
    	ddr3_vtt_toggle: ddr3_vtt_toggle {
    		pinctrl-single,pins = <
    			0x164 0x7	/* ecap0_in_pwm0_out.gpio0_7, OUTPUT | MODE7 */
    		>;
    	};
    
    	p1c_gpio_signals: p1c_gpio_signals {
    		pinctrl-single,pins = <
    		0x11C (PIN_INPUT  | MUX_MODE7)	/* GPIO0-16 J18 USB_SUBTEND_PRESENT */
    		0x120 (PIN_OUTPUT | MUX_MODE7)	/* GPIO0-17 K15 USB_SUBTEND_12V_ENABLE */
    		0x128 (PIN_INPUT  | MUX_MODE7)	/* GPIO0-28 K17 USB_SUBTEND_ENABLE */
    		>;
    	};
    
    	spi0_pins_s0: spi0_pins_s0 {
              pinctrl-single,pins = <
                   0x150 0x30	
                   0x154 0x30
                   0x158 0x10
                   0x15c 0x10
              >;
         	};
    
    
    	lcd_pins_default: lcd_pins_default {
    		pinctrl-single,pins = <
    			0x20 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad8.lcd_data23 */
    			0x24 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad9.lcd_data22 */
    			0x28 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad10.lcd_data21 */
    			0x2c (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad11.lcd_data20 */
    			0x30 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad12.lcd_data19 */
    			0x34 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad13.lcd_data18 */
    			0x38 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad14.lcd_data17 */
    			0x3c (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad15.lcd_data16 */
    			0xa0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data0.lcd_data0 */
    			0xa4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data1.lcd_data1 */
    			0xa8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data2.lcd_data2 */
    			0xac (PIN_OUTPUT | MUX_MODE0)	/* lcd_data3.lcd_data3 */
    			0xb0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data4.lcd_data4 */
    			0xb4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data5.lcd_data5 */
    			0xb8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data6.lcd_data6 */
    			0xbc (PIN_OUTPUT | MUX_MODE0)	/* lcd_data7.lcd_data7 */
    			0xc0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data8.lcd_data8 */
    			0xc4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data9.lcd_data9 */
    			0xc8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data10.lcd_data10 */
    			0xcc (PIN_OUTPUT | MUX_MODE0)	/* lcd_data11.lcd_data11 */
    			0xd0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data12.lcd_data12 */
    			0xd4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data13.lcd_data13 */
    			0xd8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data14.lcd_data14 */
    			0xdc (PIN_OUTPUT | MUX_MODE0)	/* lcd_data15.lcd_data15 */
    			0xe0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_vsync.lcd_vsync */
    			0xe4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_hsync.lcd_hsync */
    			0xe8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_pclk.lcd_pclk */
    			0xec (PIN_OUTPUT | MUX_MODE0)	/* lcd_ac_bias_en.lcd_ac_bias_en */
    		>;
    	};
    
    	lcd_pins_sleep: lcd_pins_sleep {
    		pinctrl-single,pins = <
    			0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad8.lcd_data23 */
    			0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad9.lcd_data22 */
    			0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad10.lcd_data21 */
    			0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad11.lcd_data20 */
    			0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad12.lcd_data19 */
    			0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad13.lcd_data18 */
    			0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad14.lcd_data17 */
    			0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad15.lcd_data16 */
    			0xa0 (PULL_DISABLE | MUX_MODE7)	/* lcd_data0.lcd_data0 */
    			0xa4 (PULL_DISABLE | MUX_MODE7)	/* lcd_data1.lcd_data1 */
    			0xa8 (PULL_DISABLE | MUX_MODE7)	/* lcd_data2.lcd_data2 */
    			0xac (PULL_DISABLE | MUX_MODE7)	/* lcd_data3.lcd_data3 */
    			0xb0 (PULL_DISABLE | MUX_MODE7)	/* lcd_data4.lcd_data4 */
    			0xb4 (PULL_DISABLE | MUX_MODE7)	/* lcd_data5.lcd_data5 */
    			0xb8 (PULL_DISABLE | MUX_MODE7)	/* lcd_data6.lcd_data6 */
    			0xbc (PULL_DISABLE | MUX_MODE7)	/* lcd_data7.lcd_data7 */
    			0xc0 (PULL_DISABLE | MUX_MODE7)	/* lcd_data8.lcd_data8 */
    			0xc4 (PULL_DISABLE | MUX_MODE7)	/* lcd_data9.lcd_data9 */
    			0xc8 (PULL_DISABLE | MUX_MODE7)	/* lcd_data10.lcd_data10 */
    			0xcc (PULL_DISABLE | MUX_MODE7)	/* lcd_data11.lcd_data11 */
    			0xd0 (PULL_DISABLE | MUX_MODE7)	/* lcd_data12.lcd_data12 */
    			0xd4 (PULL_DISABLE | MUX_MODE7)	/* lcd_data13.lcd_data13 */
    			0xd8 (PULL_DISABLE | MUX_MODE7)	/* lcd_data14.lcd_data14 */
    			0xdc (PULL_DISABLE | MUX_MODE7)	/* lcd_data15.lcd_data15 */
    			0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_vsync.lcd_vsync */
    			0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_hsync.lcd_hsync */
    			0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_pclk.lcd_pclk */
    			0xec (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_ac_bias_en.lcd_ac_bias_en */
    		>;
    	};
    
    	gpio_keys_s0: gpio_keys_s0 {
    		pinctrl-single,pins = <
    			0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_oen_ren.gpio2_3 */
    			0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_advn_ale.gpio2_2 */
    			0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_wait0.gpio0_30 */
    			0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ben0_cle.gpio2_5 */
    		>;
    	};
    
    	i2c0_pins: pinmux_i2c0_pins {
    		pinctrl-single,pins = <
    			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
    			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
    		>;
    	};
    
    	uart0_pins: pinmux_uart0_pins {
    		pinctrl-single,pins = <
    			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
    			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)		/* uart0_txd.uart0_txd */
    		>;
    	};
    
    	clkout2_pin: pinmux_clkout2_pin {
    		pinctrl-single,pins = <
    			0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)		/* xdma_event_intr1.clkout2 */
    		>;
    	};
    
    	cpsw_default: cpsw_default {
    		pinctrl-single,pins = <
    			/* Slave 1 */
    			0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
    			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
    			0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
    			0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
    			0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
    			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
    			0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
    			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
    			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
    			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
    			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
    			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
    
    			/* Slave 2 */
    			0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
    			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
    			0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
    			0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
    			0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
    			0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
    			0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
    			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
    			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
    			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
    			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
    			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
    		>;
    	};
    
    	cpsw_sleep: cpsw_sleep {
    		pinctrl-single,pins = <
    			/* Slave 1 reset value */
    			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    
    			/* Slave 2 reset value*/
    			0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
    		>;
    	};
    
    	mmc1_pins_default: pinmux_mmc1_pins {
    		pinctrl-single,pins = <
    			0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */
    			0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */
    			0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */
    			0x0FC (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */
    			0x100 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */
    			0x104 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */
    			0x1A0 (PIN_INPUT_PULLUP | MUX_MODE7)	/* mcasp0_aclkr.gpio3_18 */
    			0x160 (PIN_INPUT | MUX_MODE7)		/* spi0_cs1.gpio0_6 */
    		>;
    	};
    
    	mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
    		pinctrl-single,pins = <
    			0x0F0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x0F4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x0F8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x0FC (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    			0x1A0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
    		>;
    	};
    
    	mcasp1_pins: mcasp1_pins {
    		pinctrl-single,pins = <
    			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
    			0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
    			0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
    			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
    		>;
    	};
    };
    
    &usb {
    	status = "okay";
    
    	control@44e10620 {
    		status = "okay";
    	};
    
    	usb-phy@47401300 {
    		status = "okay";
    	};
    
    	usb@47401000 {
    		status = "okay";
    	};
    
    	dma-controller@47402000  {
    		status = "okay";
    	};
    
    	usb-phy@47401b00 {
    		status = "okay";
    	};
    	usb@47401800 {
    		status = "okay";
    		dr_mode = "host";
    	};
    };
    
    &uart0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&uart0_pins>;
    	status = "okay";
    };
    
    &i2c0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&i2c0_pins>;
    	status = "okay";
    	clock-frequency = <400000>;
    	tps: tps@2d {
    		reg = <0x2d>;
    	};
    	lm75_first: lm75@4c {
    		compatible = "national,lm75";
    		reg = <0x4c>;
    	};
    	lm75_second: lm75@4b {
    		compatible = "national,lm75";
    		reg = <0x4b>;
    	};
    	eeprom: eeprom-am335x {
    		compatible = "ti,am335x_eeprom","ti,am335x-evmsk", "ti,am33xx";
    		reg = <0x50>;
    		status = "okay";
            };
    };
    
    &spi0 {
           status = "okay";
           spi-flash@0 {
           compatible = "m25p80,n25q128a13";
           spi-max-frequency = <24000000>;
           reg = <0>;
           /*Adding support for defining MTD partition */
           #address-cells = <1>;
           #size-cells = <1>;
            partition@0 {
                            label = "MLO_0";
                            reg = <0x00000000 0x00020000>;
    			read-only;
                    };
            partition@0x00020000 {
                            label = "MLO_1";
                            reg = <0x00020000 0x00020000>;
    			read-only;
                    };
            partition@0x00040000 {
                            label = "UBOOT_0";
                            reg = <0x00040000 0x00080000>;
    			read-only;
                    };
            partition@0x000c0000 {
                            label = "UBOOT_1";
                            reg = <0x000c0000 0x0080000>;
    			read-only;
                    };
            partition@0x00140000 {
                            label = "KERNEL_0";
                            reg = <0x00140000 0x00320000>;
    			read-only;
                    };
            partition@0x00460000 {
                            label = "KERNEL_1";
                            reg = <0x00460000 0x00320000>;
    			read-only;
                    };
            partition@0x00780000 {
                            label = "ROOTFS_0";
                            reg = <0x00780000 0x00B00000>;
                    };
            partition@0x01280000 {
                            label = "ROOTFS_1";
                            reg = <0x01280000 0x00B00000>;
                    };
            partition@0x01D80000 {
                            label = "VAR_8";
                            reg = <0x001D80000 0x00280000>;
                    };
           /* End of added partition support */
           };
    };
    
    &wkup_m3 {
    	ti,needs-vtt-toggle;
    	ti,vtt-gpio-pin = <7>;
    	ti,scale-data-fw = "am335x-evm-scale-data.bin";
    };
    
    #include "tps65910.dtsi"
    
    &tps {
    	vcc1-supply = <&vbat>;
    	vcc2-supply = <&vbat>;
    	vcc3-supply = <&vbat>;
    	vcc4-supply = <&vbat>;
    	vcc5-supply = <&vbat>;
    	vcc6-supply = <&vbat>;
    	vcc7-supply = <&vbat>;
    	vccio-supply = <&vbat>;
    
    	regulators {
    		vrtc_reg: regulator@0 {
    			regulator-always-on;
    		};
    
    		vio_reg: regulator@1 {
    			regulator-always-on;
    		};
    
    		vdd1_reg: regulator@2 {
    			/* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
    			regulator-name = "vdd_mpu";
    			regulator-min-microvolt = <912500>;
    			regulator-max-microvolt = <1378000>;
    			regulator-boot-on;
    			regulator-always-on;
    		};
    
    		vdd2_reg: regulator@3 {
    			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
    			regulator-name = "vdd_core";
    			regulator-min-microvolt = <912500>;
    			regulator-max-microvolt = <1150000>;
    			regulator-boot-on;
    			regulator-always-on;
    		};
    
    		vdd3_reg: regulator@4 {
    			regulator-always-on;
    		};
    
    		vdig1_reg: regulator@5 {
    			regulator-always-on;
    		};
    
    		vdig2_reg: regulator@6 {
    			regulator-always-on;
    		};
    
    		vpll_reg: regulator@7 {
    			regulator-always-on;
    		};
    
    		vdac_reg: regulator@8 {
    			regulator-always-on;
    		};
    
    		vaux1_reg: regulator@9 {
    			regulator-always-on;
    		};
    
    		vaux2_reg: regulator@10 {
    			regulator-always-on;
    		};
    
    		vaux33_reg: regulator@11 {
    			regulator-always-on;
    		};
    
    		vmmc_reg: regulator@12 {
    			regulator-min-microvolt = <1800000>;
    			regulator-max-microvolt = <3300000>;
    			regulator-always-on;
    		};
    	};
    };
    
    &mmc1 {
    	status = "okay";
    	vmmc-supply = <&vmmc_reg>;
    	bus-width = <4>;
    	pinctrl-names = "default", "sleep";
    	pinctrl-0 = <&mmc1_pins_default>;
    	pinctrl-1 = <&mmc1_pins_sleep>;
    	cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
    };
    
    &gpio0 {
    	ti,no-reset-on-init;
    };
    
    

  • Hi,

    First (not related to the kernel panic) can you remove the n25q128a13 from compatible parameter. This flash is supported by m25p80 driver.

    Can you verify that you write the flash address space correctly, keeping the range within the physical boundaries?

    Best Regards,
    Yordan
  • Hi Yordan,

    Thanks for the n25q128a13 compatible parameter change suggestion . we are using the flash address within the range of physical boundaries. These are the mtd partition details after executing the cat /proc/mtd command.

    mtd0: 00020000 00001000 "MLO_0"
    mtd1: 00020000 00001000 "MLO_1"
    mtd2: 00080000 00001000 "UBOOT_0"
    mtd3: 00080000 00001000 "UBOOT_1"
    mtd4: 00320000 00001000 "KERNEL_0"
    mtd5: 00320000 00001000 "KERNEL_1"
    mtd6: 00b00000 00001000 "ROOTFS_0"
    mtd7: 00b00000 00001000 "ROOTFS_1"
    mtd8: 00280000 00001000 "VAR_8"

    here we are erasing the mtd6 or mtd7 partition for rootfs upgrade using the flash_erase and copying the rootfs.jfffs2 from USB to  erased partition using flashcp.


    Regards,
    Shrikanth